49 lines
909 B
C
49 lines
909 B
C
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/*
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* Machine specific setup for generic
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*/
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <asm/acpi.h>
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#include <asm/arch_hooks.h>
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void __init pre_intr_init_hook(void)
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{
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init_ISA_irqs();
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}
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/*
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* IRQ2 is cascade interrupt to second interrupt controller
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*/
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static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL};
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void __init intr_init_hook(void)
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{
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#ifdef CONFIG_SMP
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smp_intr_init();
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#endif
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if (!acpi_ioapic)
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setup_irq(2, &irq2);
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}
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void __init pre_setup_arch_hook(void)
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{
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/* Voyagers run their CPUs from independent clocks, so disable
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* the TSC code because we can't sync them */
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tsc_disable = 1;
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}
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void __init trap_init_hook(void)
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{
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}
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static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL};
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void __init time_init_hook(void)
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{
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setup_irq(0, &irq0);
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}
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