2005-04-17 06:20:36 +08:00
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/*
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* drivers/mtd/autcpu12.c
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*
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* Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de>
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*
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* Derived from drivers/mtd/spia.c
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2006-05-24 05:25:53 +08:00
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* Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
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2005-11-07 19:15:49 +08:00
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*
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2005-04-17 06:20:36 +08:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Overview:
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* This is a device driver for the NAND flash device found on the
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2005-11-07 19:15:49 +08:00
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* autronix autcpu12 board, which is a SmartMediaCard. It supports
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2005-04-17 06:20:36 +08:00
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* 16MiB, 32MiB and 64MiB cards.
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*
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*
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* 02-12-2002 TG Cleanup of module params
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*
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2008-02-03 23:22:34 +08:00
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* 02-20-2002 TG adjusted for different rd/wr address support
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2005-04-17 06:20:36 +08:00
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* added support for read device ready/busy line
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* added page_cache
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*
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* 10-06-2002 TG 128K card support added
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*/
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/io.h>
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2008-08-05 23:14:15 +08:00
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#include <mach/hardware.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/sizes.h>
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2008-08-05 23:14:15 +08:00
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#include <mach/autcpu12.h>
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2005-04-17 06:20:36 +08:00
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/*
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* MTD structure for AUTCPU12 board
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*/
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static struct mtd_info *autcpu12_mtd = NULL;
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2006-05-14 01:07:53 +08:00
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static void __iomem *autcpu12_fio_base;
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2005-04-17 06:20:36 +08:00
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/*
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* Define partitions for flash devices
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*/
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static struct mtd_partition partition_info16k[] = {
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{ .name = "AUTCPU12 flash partition 1",
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.offset = 0,
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.size = 8 * SZ_1M },
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{ .name = "AUTCPU12 flash partition 2",
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.offset = 8 * SZ_1M,
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.size = 8 * SZ_1M },
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};
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static struct mtd_partition partition_info32k[] = {
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{ .name = "AUTCPU12 flash partition 1",
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.offset = 0,
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.size = 8 * SZ_1M },
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{ .name = "AUTCPU12 flash partition 2",
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.offset = 8 * SZ_1M,
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.size = 24 * SZ_1M },
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};
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static struct mtd_partition partition_info64k[] = {
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{ .name = "AUTCPU12 flash partition 1",
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.offset = 0,
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.size = 16 * SZ_1M },
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{ .name = "AUTCPU12 flash partition 2",
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.offset = 16 * SZ_1M,
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.size = 48 * SZ_1M },
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};
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static struct mtd_partition partition_info128k[] = {
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{ .name = "AUTCPU12 flash partition 1",
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.offset = 0,
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.size = 16 * SZ_1M },
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{ .name = "AUTCPU12 flash partition 2",
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.offset = 16 * SZ_1M,
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.size = 112 * SZ_1M },
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};
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#define NUM_PARTITIONS16K 2
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#define NUM_PARTITIONS32K 2
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#define NUM_PARTITIONS64K 2
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#define NUM_PARTITIONS128K 2
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2005-11-07 19:15:49 +08:00
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/*
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2005-04-17 06:20:36 +08:00
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* hardware specific access to control-lines
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2006-05-24 05:25:53 +08:00
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*
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* ALE bit 4 autcpu12_pedr
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* CLE bit 5 autcpu12_pedr
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* NCE bit 0 fio_ctrl
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*
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*/
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static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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2005-04-17 06:20:36 +08:00
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{
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2006-05-24 05:25:53 +08:00
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struct nand_chip *chip = mtd->priv;
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2005-04-17 06:20:36 +08:00
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2006-05-24 05:25:53 +08:00
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if (ctrl & NAND_CTRL_CHANGE) {
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2007-06-01 15:46:35 +08:00
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void __iomem *addr;
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2006-05-24 05:25:53 +08:00
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unsigned char bits;
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2005-04-17 06:20:36 +08:00
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2006-05-24 05:25:53 +08:00
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addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET;
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bits = (ctrl & NAND_CLE) << 4;
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bits |= (ctrl & NAND_ALE) << 2;
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writeb((readb(addr) & ~0x30) | bits, addr);
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2005-04-17 06:20:36 +08:00
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2006-05-24 05:25:53 +08:00
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addr = autcpu12_fio_base + AUTCPU12_SMC_SELECT_OFFSET;
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writeb((readb(addr) & ~0x1) | (ctrl & NAND_NCE), addr);
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2005-04-17 06:20:36 +08:00
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}
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2006-05-24 05:25:53 +08:00
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, chip->IO_ADDR_W);
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2005-04-17 06:20:36 +08:00
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}
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/*
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2006-05-24 05:25:53 +08:00
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* read device ready pin
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*/
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2005-04-17 06:20:36 +08:00
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int autcpu12_device_ready(struct mtd_info *mtd)
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{
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2006-05-24 05:25:53 +08:00
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void __iomem *addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET;
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2005-04-17 06:20:36 +08:00
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2006-05-24 05:25:53 +08:00
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return readb(addr) & AUTCPU12_SMC_RDY;
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2005-04-17 06:20:36 +08:00
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}
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/*
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* Main initialization routine
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*/
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2006-05-16 20:54:50 +08:00
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static int __init autcpu12_init(void)
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2005-04-17 06:20:36 +08:00
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{
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struct nand_chip *this;
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int err = 0;
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/* Allocate memory for MTD device structure and private data */
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2006-05-24 05:25:53 +08:00
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autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip),
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GFP_KERNEL);
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2005-04-17 06:20:36 +08:00
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if (!autcpu12_mtd) {
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2006-05-14 01:07:53 +08:00
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printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
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2005-04-17 06:20:36 +08:00
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err = -ENOMEM;
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goto out;
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}
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2008-02-03 23:22:34 +08:00
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/* map physical address */
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2006-05-24 05:25:53 +08:00
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autcpu12_fio_base = ioremap(AUTCPU12_PHYS_SMC, SZ_1K);
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2006-05-14 01:07:53 +08:00
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if (!autcpu12_fio_base) {
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2005-04-17 06:20:36 +08:00
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printk("Ioremap autcpu12 SmartMedia Card failed\n");
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err = -EIO;
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goto out_mtd;
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}
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/* Get pointer to private data */
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2006-05-14 01:07:53 +08:00
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this = (struct nand_chip *)(&autcpu12_mtd[1]);
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2005-04-17 06:20:36 +08:00
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/* Initialize structures */
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2006-05-14 01:07:53 +08:00
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memset(autcpu12_mtd, 0, sizeof(struct mtd_info));
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memset(this, 0, sizeof(struct nand_chip));
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2005-04-17 06:20:36 +08:00
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/* Link the private data with the MTD structure */
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autcpu12_mtd->priv = this;
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2006-05-14 08:20:46 +08:00
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autcpu12_mtd->owner = THIS_MODULE;
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2005-04-17 06:20:36 +08:00
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/* Set address of NAND IO lines */
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this->IO_ADDR_R = autcpu12_fio_base;
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this->IO_ADDR_W = autcpu12_fio_base;
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2006-05-24 05:25:53 +08:00
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this->cmd_ctrl = autcpu12_hwcontrol;
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2005-04-17 06:20:36 +08:00
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this->dev_ready = autcpu12_device_ready;
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/* 20 us command delay time */
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2005-11-07 19:15:49 +08:00
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this->chip_delay = 20;
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2006-05-23 18:00:46 +08:00
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this->ecc.mode = NAND_ECC_SOFT;
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2005-04-17 06:20:36 +08:00
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/* Enable the following for a flash based bad block table */
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/*
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2006-05-14 01:07:53 +08:00
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this->options = NAND_USE_FLASH_BBT;
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*/
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2005-04-17 06:20:36 +08:00
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this->options = NAND_USE_FLASH_BBT;
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2005-11-07 19:15:49 +08:00
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2011-03-31 09:57:33 +08:00
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/* Scan to find existence of the device */
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2006-05-14 01:07:53 +08:00
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if (nand_scan(autcpu12_mtd, 1)) {
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2005-04-17 06:20:36 +08:00
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err = -ENXIO;
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goto out_ior;
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}
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2005-11-07 19:15:49 +08:00
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2005-04-17 06:20:36 +08:00
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/* Register the partitions */
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2006-05-14 01:07:53 +08:00
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switch (autcpu12_mtd->size) {
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2006-05-24 05:25:53 +08:00
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case SZ_16M:
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add_mtd_partitions(autcpu12_mtd, partition_info16k,
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NUM_PARTITIONS16K);
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break;
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case SZ_32M:
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add_mtd_partitions(autcpu12_mtd, partition_info32k,
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NUM_PARTITIONS32K);
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break;
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case SZ_64M:
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add_mtd_partitions(autcpu12_mtd, partition_info64k,
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NUM_PARTITIONS64K);
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break;
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case SZ_128M:
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add_mtd_partitions(autcpu12_mtd, partition_info128k,
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NUM_PARTITIONS128K);
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break;
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2006-05-14 01:07:53 +08:00
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default:
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printk("Unsupported SmartMedia device\n");
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2005-04-17 06:20:36 +08:00
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err = -ENXIO;
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goto out_ior;
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}
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goto out;
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2006-05-14 01:07:53 +08:00
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out_ior:
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2006-05-24 05:25:53 +08:00
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iounmap(autcpu12_fio_base);
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2006-05-14 01:07:53 +08:00
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out_mtd:
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kfree(autcpu12_mtd);
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out:
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2005-04-17 06:20:36 +08:00
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return err;
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}
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module_init(autcpu12_init);
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/*
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* Clean up routine
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*/
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2006-05-14 01:07:53 +08:00
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static void __exit autcpu12_cleanup(void)
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2005-04-17 06:20:36 +08:00
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{
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/* Release resources, unregister device */
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2006-05-14 01:07:53 +08:00
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nand_release(autcpu12_mtd);
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2005-04-17 06:20:36 +08:00
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2008-02-03 23:22:34 +08:00
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/* unmap physical address */
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2006-05-24 05:25:53 +08:00
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iounmap(autcpu12_fio_base);
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2005-11-07 19:15:49 +08:00
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2005-04-17 06:20:36 +08:00
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/* Free the MTD device structure */
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2006-05-14 01:07:53 +08:00
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kfree(autcpu12_mtd);
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2005-04-17 06:20:36 +08:00
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}
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2006-05-14 01:07:53 +08:00
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2005-04-17 06:20:36 +08:00
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module_exit(autcpu12_cleanup);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
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MODULE_DESCRIPTION("Glue layer for SmartMediaCard on autronix autcpu12");
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