2005-04-17 06:20:36 +08:00
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/*
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2006-10-04 05:01:26 +08:00
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* arch/ppc/platforms/prpmc800.h
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2005-04-17 06:20:36 +08:00
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*
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* Definitions for Motorola PrPMC800 board support
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*
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* Author: Dale Farnsworth <dale.farnsworth@mvista.com>
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*
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* 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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/*
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* From Processor to PCI:
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* PCI Mem Space: 0x80000000 - 0xa0000000 -> 0x80000000 - 0xa0000000 (512 MB)
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* PCI I/O Space: 0xfe400000 - 0xfeef0000 -> 0x00000000 - 0x00b00000 (11 MB)
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* Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
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*
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* From PCI to Processor:
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* System Memory: 0x00000000 -> 0x00000000
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*/
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#ifndef __ASMPPC_PRPMC800_H
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#define __ASMPPC_PRPMC800_H
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#define PRPMC800_PCI_CONFIG_ADDR 0xfe000cf8
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#define PRPMC800_PCI_CONFIG_DATA 0xfe000cfc
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#define PRPMC800_PROC_PCI_IO_START 0xfe400000U
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#define PRPMC800_PROC_PCI_IO_END 0xfeefffffU
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#define PRPMC800_PCI_IO_START 0x00000000U
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#define PRPMC800_PCI_IO_END 0x00afffffU
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#define PRPMC800_PROC_PCI_MEM_START 0x80000000U
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#define PRPMC800_PROC_PCI_MEM_END 0x9fffffffU
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#define PRPMC800_PCI_MEM_START 0x80000000U
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#define PRPMC800_PCI_MEM_END 0x9fffffffU
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#define PRPMC800_NM_PROC_PCI_MEM_START 0x40000000U
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#define PRPMC800_NM_PROC_PCI_MEM_END 0xdfffffffU
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#define PRPMC800_NM_PCI_MEM_START 0x40000000U
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#define PRPMC800_NM_PCI_MEM_END 0xdfffffffU
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#define PRPMC800_PCI_DRAM_OFFSET 0x00000000U
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#define PRPMC800_PCI_PHY_MEM_OFFSET 0x00000000U
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#define PRPMC800_ISA_IO_BASE PRPMC800_PROC_PCI_IO_START
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#define PRPMC800_ISA_MEM_BASE 0x00000000U
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#define PRPMC800_HARRIER_XCSR_BASE HARRIER_DEFAULT_XCSR_BASE
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#define PRPMC800_HARRIER_MPIC_BASE 0xff000000
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#define PRPMC800_SERIAL_1 0xfeff00c0
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#define PRPMC800_BASE_BAUD 1843200
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/*
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* interrupt vector number and priority for harrier internal interrupt
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* sources
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*/
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#define PRPMC800_INT_IRQ 16
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#define PRPMC800_INT_PRI 15
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/* UART Defines. */
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#define RS_TABLE_SIZE 4
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/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
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#define BASE_BAUD (PRPMC800_BASE_BAUD / 16)
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#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
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/* UARTS are at IRQ 16 */
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#define STD_SERIAL_PORT_DFNS \
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{ 0, BASE_BAUD, PRPMC800_SERIAL_1, 16, STD_COM_FLAGS, /* ttyS0 */\
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iomem_base: (unsigned char *)PRPMC800_SERIAL_1, \
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iomem_reg_shift: 0, \
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io_type: SERIAL_IO_MEM },
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#define SERIAL_PORT_DFNS \
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STD_SERIAL_PORT_DFNS
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#endif /* __ASMPPC_PRPMC800_H */
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