2006-12-04 20:46:52 +08:00
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/*
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* Pin definitions for AT32AP7000.
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*
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* Copyright (C) 2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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2007-10-29 22:28:07 +08:00
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#ifndef __ASM_ARCH_AT32AP700X_H__
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#define __ASM_ARCH_AT32AP700X_H__
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2006-12-04 20:46:52 +08:00
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#define GPIO_PERIPH_A 0
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#define GPIO_PERIPH_B 1
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#define NR_GPIO_CONTROLLERS 4
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/*
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* Pin numbers identifying specific GPIO pins on the chip. They can
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* also be converted to IRQ numbers by passing them through
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* gpio_to_irq().
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*/
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#define GPIO_PIOA_BASE (0)
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#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
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#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
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#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
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2007-01-30 18:16:16 +08:00
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#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
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2006-12-04 20:46:52 +08:00
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#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
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#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
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#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
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#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
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2007-01-30 18:16:16 +08:00
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#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
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2006-12-04 20:46:52 +08:00
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2007-10-29 22:28:07 +08:00
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#endif /* __ASM_ARCH_AT32AP700X_H__ */
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