94 lines
2.0 KiB
ArmAsm
94 lines
2.0 KiB
ArmAsm
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/*
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* Copyright 2003, 04 PMC-Sierra Inc.
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* Author: Manish Lachwani (lachwani@pmc-sierra.com
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* Copyright 2004 Ralf Baechle (ralf@linux-mips.org)
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*
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* First-level interrupt router for the PMC-Sierra Titan board
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Titan supports Hypertransport or PCI but not both. Hence, one interrupt
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* line is shared between the PCI slot A and Hypertransport. This is the
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* Processor INTB #0.
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*/
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#include <linux/config.h>
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#include <asm/asm.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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.align 5
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NESTED(titan_handle_int, PT_SIZE, sp)
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SAVE_ALL
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CLI
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.set at
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.set noreorder
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la ra, ret_from_irq
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mfc0 t0, CP0_CAUSE
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mfc0 t2, CP0_STATUS
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and t0, t2
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andi t2, t0, STATUSF_IP7 /* INTB5 hardware line */
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bnez t2, ll_timer_irq /* Timer */
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andi t1, t0, STATUSF_IP2 /* INTB0 hardware line */
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bnez t1, ll_pcia_irq /* 64-bit PCI */
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andi t2, t0, STATUSF_IP3 /* INTB1 hardware line */
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bnez t2, ll_pcib_irq /* second 64-bit PCI slot */
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andi t1, t0, STATUSF_IP4 /* INTB2 hardware line */
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bnez t1, ll_duart_irq /* UART */
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andi t2, t0, STATUSF_IP5 /* SMP inter-core interrupts */
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bnez t2, ll_smp_irq
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andi t1, t0, STATUSF_IP6
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bnez t1, ll_ht_irq /* Hypertransport */
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move a0, sp
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j do_extended_irq
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END(titan_handle_int)
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.set reorder
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.align 5
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ll_pcia_irq:
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li a0, 2
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move a1, sp
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#ifdef CONFIG_HYPERTRANSPORT
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j ll_ht_smp_irq_handler
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#else
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j do_IRQ
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#endif
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ll_pcib_irq:
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li a0, 3
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move a1, sp
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j do_IRQ
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ll_duart_irq:
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li a0, 4
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move a1, sp
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j do_IRQ
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ll_smp_irq:
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li a0, 5
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move a1, sp
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#ifdef CONFIG_SMP
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j titan_mailbox_irq
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#else
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j do_IRQ
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#endif
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ll_ht_irq:
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li a0, 6
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move a1, sp
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j ll_ht_smp_irq_handler
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ll_timer_irq:
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li a0, 7
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move a1, sp
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j do_IRQ
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