2008-07-16 23:12:25 +08:00
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#ifndef __ASM_RC32434_IRQ_H
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#define __ASM_RC32434_IRQ_H
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#define NR_IRQS 256
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#include <asm/mach-generic/irq.h>
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2008-08-24 00:53:50 +08:00
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#include <asm/mach-rc32434/rb.h>
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/* Interrupt Controller */
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#define IC_GROUP0_PEND (REGBASE + 0x38000)
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#define IC_GROUP0_MASK (REGBASE + 0x38008)
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#define IC_GROUP_OFFSET 0x0C
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#define NUM_INTR_GROUPS 5
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/* 16550 UARTs */
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#define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */
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/* GRP3 IRQ numbers start here */
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#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32)
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/* GRP4 IRQ numbers start here */
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#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32)
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/* GRP5 IRQ numbers start here */
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#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32)
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#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32)
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#define UART0_IRQ (GROUP3_IRQ_BASE + 0)
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2008-07-16 23:12:25 +08:00
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2008-08-22 23:00:22 +08:00
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#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0)
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#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1)
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#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
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#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
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2008-07-16 23:12:25 +08:00
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#endif /* __ASM_RC32434_IRQ_H */
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