188 lines
5.1 KiB
C
188 lines
5.1 KiB
C
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/*
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*
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* BRIEF MODULE DESCRIPTION
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* Alchemy Pb1200/Db1200 board setup.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/console.h>
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#include <linux/mc146818rtc.h>
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#include <linux/delay.h>
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#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
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#include <linux/ide.h>
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#endif
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#include <asm/cpu.h>
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#include <asm/bootinfo.h>
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#include <asm/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/reboot.h>
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#include <asm/pgtable.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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#ifdef CONFIG_MIPS_PB1200
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#include <asm/mach-pb1x00/pb1200.h>
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#endif
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#ifdef CONFIG_MIPS_DB1200
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#include <asm/mach-db1x00/db1200.h>
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#define PB1200_ETH_INT DB1200_ETH_INT
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#define PB1200_IDE_INT DB1200_IDE_INT
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#endif
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extern void _board_init_irq(void);
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extern void (*board_init_irq)(void);
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#ifdef CONFIG_BLK_DEV_IDE_AU1XXX
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extern struct ide_ops *ide_ops;
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extern struct ide_ops au1xxx_ide_ops;
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extern u32 au1xxx_ide_virtbase;
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extern u64 au1xxx_ide_physbase;
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extern int au1xxx_ide_irq;
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u32 led_base_addr;
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/* Ddma */
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chan_tab_t *ide_read_ch, *ide_write_ch;
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u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
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dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
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#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
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void board_reset (void)
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{
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bcsr->resets = 0;
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}
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void __init board_setup(void)
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{
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char *argptr = NULL;
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u32 pin_func;
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#if 0
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/* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
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* but it is board specific code, so put it here.
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*/
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pin_func = au_readl(SYS_PINFUNC);
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au_sync();
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pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
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au_writel(pin_func, SYS_PINFUNC);
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au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
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au_sync();
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#endif
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#if defined( CONFIG_I2C_ALGO_AU1550 )
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{
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u32 freq0, clksrc;
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/* Select SMBUS in CPLD */
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bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
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pin_func = au_readl(SYS_PINFUNC);
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au_sync();
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pin_func &= ~(3<<17 | 1<<4);
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/* Set GPIOs correctly */
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pin_func |= 2<<17;
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au_writel(pin_func, SYS_PINFUNC);
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au_sync();
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/* The i2c driver depends on 50Mhz clock */
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freq0 = au_readl(SYS_FREQCTRL0);
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au_sync();
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freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
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freq0 |= (3<<SYS_FC_FRDIV1_BIT);
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/* 396Mhz / (3+1)*2 == 49.5Mhz */
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au_writel(freq0, SYS_FREQCTRL0);
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au_sync();
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freq0 |= SYS_FC_FE1;
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au_writel(freq0, SYS_FREQCTRL0);
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au_sync();
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clksrc = au_readl(SYS_CLKSRC);
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au_sync();
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clksrc &= ~0x01f00000;
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/* bit 22 is EXTCLK0 for PSC0 */
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clksrc |= (0x3 << 22);
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au_writel(clksrc, SYS_CLKSRC);
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au_sync();
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}
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#endif
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#ifdef CONFIG_FB_AU1200
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argptr = prom_getcmdline();
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#ifdef CONFIG_MIPS_PB1200
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strcat(argptr, " video=au1200fb:panel:s11");
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#endif
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#ifdef CONFIG_MIPS_DB1200
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strcat(argptr, " video=au1200fb:panel:s7");
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#endif
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#endif
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#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
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/*
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* Iniz IDE parameters
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*/
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ide_ops = &au1xxx_ide_ops;
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au1xxx_ide_irq = PB1200_IDE_INT;
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au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
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au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
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/*
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* change PIO or PIO+Ddma
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* check the GPIO-5 pin condition. pb1200:s18_dot */
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switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0;
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#endif
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/* The Pb1200 development board uses external MUX for PSC0 to
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support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
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*/
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#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
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#error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
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Refer to Pb1200/Db1200 documentation.
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#elif defined( CONFIG_AU1550_PSC_SPI )
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bcsr->resets |= BCSR_RESETS_PCS0MUX;
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#elif defined( CONFIG_I2C_ALGO_AU1550 )
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bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
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#endif
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au_sync();
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#ifdef CONFIG_MIPS_PB1200
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printk("AMD Alchemy Pb1200 Board\n");
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#endif
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#ifdef CONFIG_MIPS_DB1200
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printk("AMD Alchemy Db1200 Board\n");
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#endif
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#if 0
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/* Setup Pb1200 External Interrupt Controller */
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{
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extern void (*board_init_irq)(void);
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extern void _board_init_irq(void);
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board_init_irq = _board_init_irq;
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}
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#endif
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}
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