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linux-stable-rt/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h

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[ARM] 4210/1: base for new machine type "NetSilicon NS9360" Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-02-16 22:36:55 +08:00
/*
* include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
*
* Copyright (C) 2006 by Digi International Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#ifndef __ASM_ARCH_REGSBOARDA9M9750_H
#define __ASM_ARCH_REGSBOARDA9M9750_H
#include <asm/hardware.h>
#define FPGA_UARTA_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0))
#define FPGA_UARTB_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08)
#define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10)
#define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18)
[ARM] 4595/1: ns9xxx: define registers as void __iomem * instead of volatile u32 As a consequence registers are now accessed with __raw_{read,write}[bl]. Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-10-01 03:36:33 +08:00
#define FPGA_IER __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
#define FPGA_ISR __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
[ARM] 4210/1: base for new machine type "NetSilicon NS9360" Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-02-16 22:36:55 +08:00
#endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */