59 lines
1.5 KiB
C
59 lines
1.5 KiB
C
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#ifndef PCM1796_H_INCLUDED
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#define PCM1796_H_INCLUDED
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/* register 16 */
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#define PCM1796_ATL_MASK 0xff
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/* register 17 */
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#define PCM1796_ATR_MASK 0xff
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/* register 18 */
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#define PCM1796_MUTE 0x01
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#define PCM1796_DME 0x02
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#define PCM1796_DMF_MASK 0x0c
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#define PCM1796_DMF_DISABLED 0x00
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#define PCM1796_DMF_48 0x04
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#define PCM1796_DMF_441 0x08
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#define PCM1796_DMF_32 0x0c
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#define PCM1796_FMT_MASK 0x70
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#define PCM1796_FMT_16_RJUST 0x00
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#define PCM1796_FMT_20_RJUST 0x10
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#define PCM1796_FMT_24_RJUST 0x20
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#define PCM1796_FMT_24_LJUST 0x30
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#define PCM1796_FMT_16_I2S 0x40
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#define PCM1796_FMT_24_I2S 0x50
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#define PCM1796_ATLD 0x80
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/* register 19 */
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#define PCM1796_INZD 0x01
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#define PCM1796_FLT_MASK 0x02
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#define PCM1796_FLT_SHARP 0x00
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#define PCM1796_FLT_SLOW 0x02
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#define PCM1796_DFMS 0x04
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#define PCM1796_OPE 0x10
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#define PCM1796_ATS_MASK 0x60
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#define PCM1796_ATS_1 0x00
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#define PCM1796_ATS_2 0x20
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#define PCM1796_ATS_4 0x40
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#define PCM1796_ATS_8 0x60
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#define PCM1796_REV 0x80
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/* register 20 */
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#define PCM1796_OS_MASK 0x03
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#define PCM1796_OS_64 0x00
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#define PCM1796_OS_32 0x01
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#define PCM1796_OS_128 0x02
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#define PCM1796_CHSL_MASK 0x04
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#define PCM1796_CHSL_LEFT 0x00
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#define PCM1796_CHSL_RIGHT 0x04
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#define PCM1796_MONO 0x08
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#define PCM1796_DFTH 0x10
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#define PCM1796_DSD 0x20
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#define PCM1796_SRST 0x40
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/* register 21 */
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#define PCM1796_PCMZ 0x01
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#define PCM1796_DZ_MASK 0x06
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/* register 22 */
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#define PCM1796_ZFGL 0x01
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#define PCM1796_ZFGR 0x02
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/* register 23 */
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#define PCM1796_ID_MASK 0x1f
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#endif
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