217 lines
9.5 KiB
C
217 lines
9.5 KiB
C
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/*
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* STMP TIMROT Register Definitions
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*
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* Copyright (c) 2008 Freescale Semiconductor
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ARCH_ARM___TIMROT_H
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#define __ARCH_ARM___TIMROT_H 1
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#include <mach/stmp3xxx_regs.h>
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#define REGS_TIMROT_BASE (REGS_BASE + 0x68000)
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#define REGS_TIMROT_BASE_PHYS (0x80068000)
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#define REGS_TIMROT_SIZE 0x00002000
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HW_REGISTER(HW_TIMROT_ROTCTRL, REGS_TIMROT_BASE, 0x00000000)
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#define HW_TIMROT_ROTCTRL_ADDR (REGS_TIMROT_BASE + 0x00000000)
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#define BM_TIMROT_ROTCTRL_SFTRST 0x80000000
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#define BM_TIMROT_ROTCTRL_CLKGATE 0x40000000
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#define BM_TIMROT_ROTCTRL_ROTARY_PRESENT 0x20000000
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#define BM_TIMROT_ROTCTRL_TIM3_PRESENT 0x10000000
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#define BM_TIMROT_ROTCTRL_TIM2_PRESENT 0x08000000
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#define BM_TIMROT_ROTCTRL_TIM1_PRESENT 0x04000000
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#define BM_TIMROT_ROTCTRL_TIM0_PRESENT 0x02000000
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#define BP_TIMROT_ROTCTRL_STATE 22
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#define BM_TIMROT_ROTCTRL_STATE 0x01C00000
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#define BF_TIMROT_ROTCTRL_STATE(v) \
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(((v) << 22) & BM_TIMROT_ROTCTRL_STATE)
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#define BP_TIMROT_ROTCTRL_DIVIDER 16
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#define BM_TIMROT_ROTCTRL_DIVIDER 0x003F0000
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#define BF_TIMROT_ROTCTRL_DIVIDER(v) \
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(((v) << 16) & BM_TIMROT_ROTCTRL_DIVIDER)
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#define BM_TIMROT_ROTCTRL_RELATIVE 0x00001000
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#define BP_TIMROT_ROTCTRL_OVERSAMPLE 10
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#define BM_TIMROT_ROTCTRL_OVERSAMPLE 0x00000C00
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#define BF_TIMROT_ROTCTRL_OVERSAMPLE(v) \
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(((v) << 10) & BM_TIMROT_ROTCTRL_OVERSAMPLE)
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#define BV_TIMROT_ROTCTRL_OVERSAMPLE__8X 0x0
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#define BV_TIMROT_ROTCTRL_OVERSAMPLE__4X 0x1
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#define BV_TIMROT_ROTCTRL_OVERSAMPLE__2X 0x2
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#define BV_TIMROT_ROTCTRL_OVERSAMPLE__1X 0x3
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#define BM_TIMROT_ROTCTRL_POLARITY_B 0x00000200
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#define BM_TIMROT_ROTCTRL_POLARITY_A 0x00000100
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#define BP_TIMROT_ROTCTRL_SELECT_B 4
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#define BM_TIMROT_ROTCTRL_SELECT_B 0x00000070
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#define BF_TIMROT_ROTCTRL_SELECT_B(v) \
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(((v) << 4) & BM_TIMROT_ROTCTRL_SELECT_B)
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#define BV_TIMROT_ROTCTRL_SELECT_B__NEVER_TICK 0x0
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM0 0x1
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM1 0x2
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM2 0x3
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM3 0x4
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#define BV_TIMROT_ROTCTRL_SELECT_B__PWM4 0x5
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#define BV_TIMROT_ROTCTRL_SELECT_B__ROTARYA 0x6
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#define BV_TIMROT_ROTCTRL_SELECT_B__ROTARYB 0x7
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#define BP_TIMROT_ROTCTRL_SELECT_A 0
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#define BM_TIMROT_ROTCTRL_SELECT_A 0x00000007
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#define BF_TIMROT_ROTCTRL_SELECT_A(v) \
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(((v) << 0) & BM_TIMROT_ROTCTRL_SELECT_A)
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#define BV_TIMROT_ROTCTRL_SELECT_A__NEVER_TICK 0x0
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM0 0x1
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM1 0x2
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM2 0x3
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM3 0x4
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#define BV_TIMROT_ROTCTRL_SELECT_A__PWM4 0x5
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#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYA 0x6
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#define BV_TIMROT_ROTCTRL_SELECT_A__ROTARYB 0x7
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HW_REGISTER_0(HW_TIMROT_ROTCOUNT, REGS_TIMROT_BASE, 0x00000010)
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#define HW_TIMROT_ROTCOUNT_ADDR (REGS_TIMROT_BASE + 0x00000010)
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#define BP_TIMROT_ROTCOUNT_UPDOWN 0
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#define BM_TIMROT_ROTCOUNT_UPDOWN 0x0000FFFF
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#define BF_TIMROT_ROTCOUNT_UPDOWN(v) \
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(((v) << 0) & BM_TIMROT_ROTCOUNT_UPDOWN)
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/*
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* multi-register-define name HW_TIMROT_TIMCTRLn
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* base 0x00000020
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* count 3
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* offset 0x20
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*/
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HW_REGISTER_INDEXED(HW_TIMROT_TIMCTRLn, REGS_TIMROT_BASE, 0x00000020, 0x20)
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#define BM_TIMROT_TIMCTRLn_IRQ 0x00008000
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#define BM_TIMROT_TIMCTRLn_IRQ_EN 0x00004000
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#define BM_TIMROT_TIMCTRLn_POLARITY 0x00000100
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#define BM_TIMROT_TIMCTRLn_UPDATE 0x00000080
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#define BM_TIMROT_TIMCTRLn_RELOAD 0x00000040
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#define BP_TIMROT_TIMCTRLn_PRESCALE 4
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#define BM_TIMROT_TIMCTRLn_PRESCALE 0x00000030
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#define BF_TIMROT_TIMCTRLn_PRESCALE(v) \
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(((v) << 4) & BM_TIMROT_TIMCTRLn_PRESCALE)
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#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_1 0x0
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#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_2 0x1
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#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_4 0x2
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#define BV_TIMROT_TIMCTRLn_PRESCALE__DIV_BY_8 0x3
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#define BP_TIMROT_TIMCTRLn_SELECT 0
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#define BM_TIMROT_TIMCTRLn_SELECT 0x0000000F
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#define BF_TIMROT_TIMCTRLn_SELECT(v) \
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(((v) << 0) & BM_TIMROT_TIMCTRLn_SELECT)
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#define BV_TIMROT_TIMCTRLn_SELECT__NEVER_TICK 0x0
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM0 0x1
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM1 0x2
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM2 0x3
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM3 0x4
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#define BV_TIMROT_TIMCTRLn_SELECT__PWM4 0x5
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#define BV_TIMROT_TIMCTRLn_SELECT__ROTARYA 0x6
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#define BV_TIMROT_TIMCTRLn_SELECT__ROTARYB 0x7
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#define BV_TIMROT_TIMCTRLn_SELECT__32KHZ_XTAL 0x8
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#define BV_TIMROT_TIMCTRLn_SELECT__8KHZ_XTAL 0x9
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#define BV_TIMROT_TIMCTRLn_SELECT__4KHZ_XTAL 0xA
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#define BV_TIMROT_TIMCTRLn_SELECT__1KHZ_XTAL 0xB
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#define BV_TIMROT_TIMCTRLn_SELECT__TICK_ALWAYS 0xC
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/*
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* multi-register-define name HW_TIMROT_TIMCOUNTn
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* base 0x00000030
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* count 3
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* offset 0x20
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*/
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HW_REGISTER_0_INDEXED(HW_TIMROT_TIMCOUNTn, REGS_TIMROT_BASE, 0x00000030,
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0x20)
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#define BP_TIMROT_TIMCOUNTn_RUNNING_COUNT 16
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#define BM_TIMROT_TIMCOUNTn_RUNNING_COUNT 0xFFFF0000
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#define BF_TIMROT_TIMCOUNTn_RUNNING_COUNT(v) \
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(((v) << 16) & BM_TIMROT_TIMCOUNTn_RUNNING_COUNT)
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#define BP_TIMROT_TIMCOUNTn_FIXED_COUNT 0
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#define BM_TIMROT_TIMCOUNTn_FIXED_COUNT 0x0000FFFF
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#define BF_TIMROT_TIMCOUNTn_FIXED_COUNT(v) \
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(((v) << 0) & BM_TIMROT_TIMCOUNTn_FIXED_COUNT)
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HW_REGISTER(HW_TIMROT_TIMCTRL3, REGS_TIMROT_BASE, 0x00000080)
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#define HW_TIMROT_TIMCTRL3_ADDR (REGS_TIMROT_BASE + 0x00000080)
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#define BP_TIMROT_TIMCTRL3_TEST_SIGNAL 16
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#define BM_TIMROT_TIMCTRL3_TEST_SIGNAL 0x000F0000
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#define BF_TIMROT_TIMCTRL3_TEST_SIGNAL(v) \
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(((v) << 16) & BM_TIMROT_TIMCTRL3_TEST_SIGNAL)
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__NEVER_TICK 0x0
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM0 0x1
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM1 0x2
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM2 0x3
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM3 0x4
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__PWM4 0x5
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__ROTARYA 0x6
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__ROTARYB 0x7
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__32KHZ_XTAL 0x8
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__8KHZ_XTAL 0x9
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__4KHZ_XTAL 0xA
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__1KHZ_XTAL 0xB
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#define BV_TIMROT_TIMCTRL3_TEST_SIGNAL__TICK_ALWAYS 0xC
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#define BM_TIMROT_TIMCTRL3_IRQ 0x00008000
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#define BM_TIMROT_TIMCTRL3_IRQ_EN 0x00004000
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#define BM_TIMROT_TIMCTRL3_DUTY_VALID 0x00000400
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#define BM_TIMROT_TIMCTRL3_DUTY_CYCLE 0x00000200
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#define BM_TIMROT_TIMCTRL3_POLARITY 0x00000100
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#define BM_TIMROT_TIMCTRL3_UPDATE 0x00000080
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#define BM_TIMROT_TIMCTRL3_RELOAD 0x00000040
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#define BP_TIMROT_TIMCTRL3_PRESCALE 4
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#define BM_TIMROT_TIMCTRL3_PRESCALE 0x00000030
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#define BF_TIMROT_TIMCTRL3_PRESCALE(v) \
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(((v) << 4) & BM_TIMROT_TIMCTRL3_PRESCALE)
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#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_1 0x0
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#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_2 0x1
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#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_4 0x2
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#define BV_TIMROT_TIMCTRL3_PRESCALE__DIV_BY_8 0x3
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#define BP_TIMROT_TIMCTRL3_SELECT 0
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#define BM_TIMROT_TIMCTRL3_SELECT 0x0000000F
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#define BF_TIMROT_TIMCTRL3_SELECT(v) \
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(((v) << 0) & BM_TIMROT_TIMCTRL3_SELECT)
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#define BV_TIMROT_TIMCTRL3_SELECT__NEVER_TICK 0x0
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM0 0x1
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM1 0x2
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM2 0x3
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM3 0x4
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#define BV_TIMROT_TIMCTRL3_SELECT__PWM4 0x5
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#define BV_TIMROT_TIMCTRL3_SELECT__ROTARYA 0x6
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#define BV_TIMROT_TIMCTRL3_SELECT__ROTARYB 0x7
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#define BV_TIMROT_TIMCTRL3_SELECT__32KHZ_XTAL 0x8
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#define BV_TIMROT_TIMCTRL3_SELECT__8KHZ_XTAL 0x9
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#define BV_TIMROT_TIMCTRL3_SELECT__4KHZ_XTAL 0xA
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#define BV_TIMROT_TIMCTRL3_SELECT__1KHZ_XTAL 0xB
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#define BV_TIMROT_TIMCTRL3_SELECT__TICK_ALWAYS 0xC
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HW_REGISTER_0(HW_TIMROT_TIMCOUNT3, REGS_TIMROT_BASE, 0x00000090)
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#define HW_TIMROT_TIMCOUNT3_ADDR (REGS_TIMROT_BASE + 0x00000090)
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#define BP_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT 16
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#define BM_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT 0xFFFF0000
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#define BF_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT(v) \
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(((v) << 16) & BM_TIMROT_TIMCOUNT3_LOW_RUNNING_COUNT)
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#define BP_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT 0
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#define BM_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT 0x0000FFFF
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#define BF_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT(v) \
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(((v) << 0) & BM_TIMROT_TIMCOUNT3_HIGH_FIXED_COUNT)
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HW_REGISTER_0(HW_TIMROT_VERSION, REGS_TIMROT_BASE, 0x000000a0)
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#define HW_TIMROT_VERSION_ADDR (REGS_TIMROT_BASE + 0x000000a0)
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#define BP_TIMROT_VERSION_MAJOR 24
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#define BM_TIMROT_VERSION_MAJOR 0xFF000000
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#define BF_TIMROT_VERSION_MAJOR(v) \
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(((v) << 24) & BM_TIMROT_VERSION_MAJOR)
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#define BP_TIMROT_VERSION_MINOR 16
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#define BM_TIMROT_VERSION_MINOR 0x00FF0000
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#define BF_TIMROT_VERSION_MINOR(v) \
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(((v) << 16) & BM_TIMROT_VERSION_MINOR)
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#define BP_TIMROT_VERSION_STEP 0
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#define BM_TIMROT_VERSION_STEP 0x0000FFFF
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#define BF_TIMROT_VERSION_STEP(v) \
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(((v) << 0) & BM_TIMROT_VERSION_STEP)
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#endif /* __ARCH_ARM___TIMROT_H */
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