127 lines
2.6 KiB
C
127 lines
2.6 KiB
C
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/*
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* Copyright (C) 1996 Paul Mackerras.
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*/
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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/*
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* If the bitops are not inlined in bitops.h, they are defined here.
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* -- paulus
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*/
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#if !__INLINE_BITOPS
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void set_bit(int nr, volatile void * addr)
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{
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unsigned long old;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%3 \n\
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or %0,%0,%2 \n"
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc" );
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}
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void clear_bit(int nr, volatile void *addr)
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{
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unsigned long old;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%3 \n\
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andc %0,%0,%2 \n"
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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}
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void change_bit(int nr, volatile void *addr)
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{
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unsigned long old;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%3 \n\
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xor %0,%0,%2 \n"
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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}
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int test_and_set_bit(int nr, volatile void *addr)
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{
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unsigned int old, t;
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unsigned int mask = 1 << (nr & 0x1f);
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volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%4 \n\
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or %1,%0,%3 \n"
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PPC405_ERR77(0,%4)
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" stwcx. %1,0,%4 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=&r" (t), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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return (old & mask) != 0;
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}
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int test_and_clear_bit(int nr, volatile void *addr)
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{
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unsigned int old, t;
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unsigned int mask = 1 << (nr & 0x1f);
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volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%4 \n\
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andc %1,%0,%3 \n"
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PPC405_ERR77(0,%4)
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" stwcx. %1,0,%4 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=&r" (t), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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return (old & mask) != 0;
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}
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int test_and_change_bit(int nr, volatile void *addr)
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{
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unsigned int old, t;
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unsigned int mask = 1 << (nr & 0x1f);
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volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%4 \n\
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xor %1,%0,%3 \n"
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PPC405_ERR77(0,%4)
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" stwcx. %1,0,%4 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=&r" (t), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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return (old & mask) != 0;
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}
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#endif /* !__INLINE_BITOPS */
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