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linux-stable-rt/arch/arm/mach-s3c64xx/include/mach/pll.h

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[ARM] S3C64XX: Add PLL definitions Add definitions for the s3c6400 epll and main pll as well as functions to decode the rate. Add Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-10-21 21:06:59 +08:00
/* arch/arm/plat-s3c64xx/include/plat/pll.h
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* S3C64XX PLL code
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
[ARM] S3C64XX: Mask the pll values correctly Correct the PLL field masks to ensure the PLL functions return the right value. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [ben-linux@fluff.org: improve the description text] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-11-25 16:05:22 +08:00
#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1)
#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1)
#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1)
[ARM] S3C64XX: Add PLL definitions Add definitions for the s3c6400 epll and main pll as well as functions to decode the rate. Add Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-10-21 21:06:59 +08:00
#define S3C6400_PLL_MDIV_SHIFT (16)
#define S3C6400_PLL_PDIV_SHIFT (8)
#define S3C6400_PLL_SDIV_SHIFT (0)
#include <asm/div64.h>
ARM: SAMSUNG: Move S3C6400 PLL code to <plat/pll.h> for re-use The S3C6400 EPLL code matches the S3C2416 and compatible SoCs, so move it from mach-s3c64xx into <plat/pll.h> for easy reuse. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-04-28 17:10:02 +08:00
#include <plat/pll6553x.h>
[ARM] S3C64XX: Add PLL definitions Add definitions for the s3c6400 epll and main pll as well as functions to decode the rate. Add Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-10-21 21:06:59 +08:00
static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
u32 pllcon)
{
u32 mdiv, pdiv, sdiv;
u64 fvco = baseclk;
mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK;
pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK;
sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK;
fvco *= mdiv;
do_div(fvco, (pdiv << sdiv));
return (unsigned long)fvco;
}
static inline unsigned long s3c6400_get_epll(unsigned long baseclk)
{
ARM: SAMSUNG: Move S3C6400 PLL code to <plat/pll.h> for re-use The S3C6400 EPLL code matches the S3C2416 and compatible SoCs, so move it from mach-s3c64xx into <plat/pll.h> for easy reuse. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-04-28 17:10:02 +08:00
return s3c_get_pll6553x(baseclk, __raw_readl(S3C_EPLL_CON0),
__raw_readl(S3C_EPLL_CON1));
[ARM] S3C64XX: Add PLL definitions Add definitions for the s3c6400 epll and main pll as well as functions to decode the rate. Add Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2008-10-21 21:06:59 +08:00
}