45 lines
1.5 KiB
C
45 lines
1.5 KiB
C
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/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* GPIO Bank E register and configuration definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define S3C64XX_GPECON (S3C64XX_GPE_BASE + 0x00)
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#define S3C64XX_GPEDAT (S3C64XX_GPE_BASE + 0x04)
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#define S3C64XX_GPEPUD (S3C64XX_GPE_BASE + 0x08)
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#define S3C64XX_GPECONSLP (S3C64XX_GPE_BASE + 0x0c)
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#define S3C64XX_GPEPUDSLP (S3C64XX_GPE_BASE + 0x10)
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#define S3C64XX_GPE_CONMASK(__gpio) (0xf << ((__gpio) * 4))
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#define S3C64XX_GPE_INPUT(__gpio) (0x0 << ((__gpio) * 4))
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#define S3C64XX_GPE_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
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#define S3C64XX_GPE0_PCM1_SCLK (0x02 << 0)
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#define S3C64XX_GPE0_I2S1_CLK (0x03 << 0)
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#define S3C64XX_GPE0_AC97_BITCLK (0x04 << 0)
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#define S3C64XX_GPE1_PCM1_EXTCLK (0x02 << 4)
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#define S3C64XX_GPE1_I2S1_CDCLK (0x03 << 4)
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#define S3C64XX_GPE1_AC97_nRESET (0x04 << 4)
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#define S3C64XX_GPE2_PCM1_FSYNC (0x02 << 8)
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#define S3C64XX_GPE2_I2S1_LRCLK (0x03 << 8)
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#define S3C64XX_GPE2_AC97_SYNC (0x04 << 8)
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#define S3C64XX_GPE3_PCM1_SIN (0x02 << 12)
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#define S3C64XX_GPE3_I2S1_DI (0x03 << 12)
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#define S3C64XX_GPE3_AC97_SDI (0x04 << 12)
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#define S3C64XX_GPE4_PCM1_SOUT (0x02 << 16)
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#define S3C64XX_GPE4_I2S1_D0 (0x03 << 16)
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#define S3C64XX_GPE4_AC97_SDO (0x04 << 16)
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