71 lines
1.9 KiB
C
71 lines
1.9 KiB
C
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/*
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* STx GP3 board definitions
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*
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* Dan Malek (dan@embeddededge.com)
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* Copyright 2004 Embedded Edge, LLC
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*
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* Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
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* Copyright 2004-2005 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __MACH_STX_GP3_H
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#define __MACH_STX_GP3_H
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#include <linux/config.h>
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#include <linux/init.h>
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#include <asm/ppcboot.h>
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#define BOARD_CCSRBAR ((uint)0xe0000000)
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#define CCSRBAR_SIZE ((uint)1024*1024)
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#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
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#define BCSR_ADDR ((uint)0xfc000000)
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#define BCSR_SIZE ((uint)(16 * 1024))
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#define BCSR_TSEC1_RESET 0x00000080
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#define BCSR_TSEC2_RESET 0x00000040
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#define BCSR_LED1 0x00000008
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#define BCSR_LED2 0x00000004
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#define BCSR_LED3 0x00000002
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#define BCSR_LED4 0x00000001
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extern void mpc85xx_setup_hose(void) __init;
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extern void mpc85xx_restart(char *cmd);
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extern void mpc85xx_power_off(void);
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extern void mpc85xx_halt(void);
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extern void mpc85xx_init_IRQ(void) __init;
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extern unsigned long mpc85xx_find_end_of_memory(void) __init;
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extern void mpc85xx_calibrate_decr(void) __init;
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#define PCI_CFG_ADDR_OFFSET (0x8000)
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#define PCI_CFG_DATA_OFFSET (0x8004)
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/* PCI interrupt controller */
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#define PIRQA MPC85xx_IRQ_EXT1
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#define PIRQB MPC85xx_IRQ_EXT2
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#define PIRQC MPC85xx_IRQ_EXT3
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#define PIRQD MPC85xx_IRQ_EXT4
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#define PCI_MIN_IDSEL 16
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#define PCI_MAX_IDSEL 19
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#define PCI_IRQ_SLOT 4
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#define MPC85XX_PCI1_LOWER_IO 0x00000000
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#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
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#define MPC85XX_PCI1_LOWER_MEM 0x80000000
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#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
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#define MPC85XX_PCI1_IO_BASE 0xe2000000
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#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
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#define MPC85XX_PCI1_IO_SIZE 0x01000000
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#endif /* __MACH_STX_GP3_H */
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