2008-06-05 20:49:34 +08:00
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/* sound/soc/at32/playpaq_wm8510.c
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* ASoC machine driver for PlayPaq using WM8510 codec
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*
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* Copyright (C) 2008 Long Range Systems
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* Geoffrey Wossum <gwossum@acm.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This code is largely inspired by sound/soc/at91/eti_b1_wm8731.c
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*
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* NOTE: If you don't have the AT32 enhanced portmux configured (which
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* isn't currently in the mainline or Atmel patched kernel), you will
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* need to set the MCLK pin (PA30) to peripheral A in your board initialization
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* code. Something like:
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* at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
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*
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*/
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/* #define DEBUG */
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/version.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/clk.h>
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#include <linux/timer.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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2008-08-05 23:14:15 +08:00
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#include <mach/at32ap700x.h>
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#include <mach/portmux.h>
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2008-06-05 20:49:34 +08:00
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#include "../codecs/wm8510.h"
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#include "at32-pcm.h"
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#include "at32-ssc.h"
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/*-------------------------------------------------------------------------*\
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* constants
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\*-------------------------------------------------------------------------*/
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#define MCLK_PIN GPIO_PIN_PA(30)
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#define MCLK_PERIPH GPIO_PERIPH_A
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/*-------------------------------------------------------------------------*\
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* data types
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\*-------------------------------------------------------------------------*/
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/* SSC clocking data */
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struct ssc_clock_data {
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/* CMR div */
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unsigned int cmr_div;
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/* Frame period (as needed by xCMR.PERIOD) */
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unsigned int period;
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/* The SSC clock rate these settings where calculated for */
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unsigned long ssc_rate;
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};
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/*-------------------------------------------------------------------------*\
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* module data
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\*-------------------------------------------------------------------------*/
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static struct clk *_gclk0;
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static struct clk *_pll0;
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#define CODEC_CLK (_gclk0)
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/*-------------------------------------------------------------------------*\
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* Sound SOC operations
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\*-------------------------------------------------------------------------*/
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#if defined CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE
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static struct ssc_clock_data playpaq_wm8510_calc_ssc_clock(
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struct snd_pcm_hw_params *params,
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2008-07-07 23:07:29 +08:00
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struct snd_soc_dai *cpu_dai)
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2008-06-05 20:49:34 +08:00
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{
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struct at32_ssc_info *ssc_p = cpu_dai->private_data;
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struct ssc_device *ssc = ssc_p->ssc;
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struct ssc_clock_data cd;
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unsigned int rate, width_bits, channels;
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unsigned int bitrate, ssc_div;
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unsigned actual_rate;
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/*
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* Figure out required bitrate
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*/
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rate = params_rate(params);
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channels = params_channels(params);
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width_bits = snd_pcm_format_physical_width(params_format(params));
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bitrate = rate * width_bits * channels;
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/*
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* Figure out required SSC divider and period for required bitrate
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*/
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cd.ssc_rate = clk_get_rate(ssc->clk);
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ssc_div = cd.ssc_rate / bitrate;
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cd.cmr_div = ssc_div / 2;
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if (ssc_div & 1) {
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/* round cmr_div up */
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cd.cmr_div++;
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}
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cd.period = width_bits - 1;
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/*
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* Find actual rate, compare to requested rate
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*/
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actual_rate = (cd.ssc_rate / (cd.cmr_div * 2)) / (2 * (cd.period + 1));
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pr_debug("playpaq_wm8510: Request rate = %d, actual rate = %d\n",
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rate, actual_rate);
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return cd;
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}
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#endif /* CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE */
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static int playpaq_wm8510_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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2008-07-07 23:07:29 +08:00
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struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
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struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
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2008-06-05 20:49:34 +08:00
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struct at32_ssc_info *ssc_p = cpu_dai->private_data;
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struct ssc_device *ssc = ssc_p->ssc;
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unsigned int pll_out = 0, bclk = 0, mclk_div = 0;
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int ret;
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/* Due to difficulties with getting the correct clocks from the AT32's
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* PLL0, we're going to let the CODEC be in charge of all the clocks
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*/
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#if !defined CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE
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const unsigned int fmt = (SND_SOC_DAIFMT_I2S |
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SND_SOC_DAIFMT_NB_NF |
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SND_SOC_DAIFMT_CBM_CFM);
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#else
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struct ssc_clock_data cd;
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const unsigned int fmt = (SND_SOC_DAIFMT_I2S |
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SND_SOC_DAIFMT_NB_NF |
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SND_SOC_DAIFMT_CBS_CFS);
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#endif
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if (ssc == NULL) {
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pr_warning("playpaq_wm8510_hw_params: ssc is NULL!\n");
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return -EINVAL;
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}
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/*
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* Figure out PLL and BCLK dividers for WM8510
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*/
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switch (params_rate(params)) {
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case 48000:
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pll_out = 12288000;
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mclk_div = WM8510_MCLKDIV_1;
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bclk = WM8510_BCLKDIV_8;
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break;
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case 44100:
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pll_out = 11289600;
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mclk_div = WM8510_MCLKDIV_1;
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bclk = WM8510_BCLKDIV_8;
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break;
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case 22050:
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pll_out = 11289600;
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mclk_div = WM8510_MCLKDIV_2;
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bclk = WM8510_BCLKDIV_8;
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break;
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case 16000:
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pll_out = 12288000;
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mclk_div = WM8510_MCLKDIV_3;
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bclk = WM8510_BCLKDIV_8;
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break;
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case 11025:
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pll_out = 11289600;
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mclk_div = WM8510_MCLKDIV_4;
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bclk = WM8510_BCLKDIV_8;
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break;
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case 8000:
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pll_out = 12288000;
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mclk_div = WM8510_MCLKDIV_6;
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bclk = WM8510_BCLKDIV_8;
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break;
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default:
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pr_warning("playpaq_wm8510: Unsupported sample rate %d\n",
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params_rate(params));
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return -EINVAL;
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}
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/*
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* set CPU and CODEC DAI configuration
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*/
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2008-07-08 20:19:18 +08:00
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ret = snd_soc_dai_set_fmt(codec_dai, fmt);
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2008-06-05 20:49:34 +08:00
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if (ret < 0) {
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pr_warning("playpaq_wm8510: "
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"Failed to set CODEC DAI format (%d)\n",
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ret);
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return ret;
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}
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2008-07-08 20:19:18 +08:00
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ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
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2008-06-05 20:49:34 +08:00
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if (ret < 0) {
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pr_warning("playpaq_wm8510: "
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"Failed to set CPU DAI format (%d)\n",
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ret);
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return ret;
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}
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/*
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* Set CPU clock configuration
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*/
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#if defined CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE
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cd = playpaq_wm8510_calc_ssc_clock(params, cpu_dai);
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pr_debug("playpaq_wm8510: cmr_div = %d, period = %d\n",
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cd.cmr_div, cd.period);
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2008-07-08 20:19:18 +08:00
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ret = snd_soc_dai_set_clkdiv(cpu_dai, AT32_SSC_CMR_DIV, cd.cmr_div);
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2008-06-05 20:49:34 +08:00
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if (ret < 0) {
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pr_warning("playpaq_wm8510: Failed to set CPU CMR_DIV (%d)\n",
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ret);
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return ret;
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}
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2008-07-08 20:19:18 +08:00
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ret = snd_soc_dai_set_clkdiv(cpu_dai, AT32_SSC_TCMR_PERIOD,
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2008-06-05 20:49:34 +08:00
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cd.period);
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if (ret < 0) {
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pr_warning("playpaq_wm8510: "
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"Failed to set CPU transmit period (%d)\n",
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ret);
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return ret;
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}
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#endif /* CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE */
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/*
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* Set CODEC clock configuration
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*/
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pr_debug("playpaq_wm8510: "
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"pll_in = %ld, pll_out = %u, bclk = %x, mclk = %x\n",
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clk_get_rate(CODEC_CLK), pll_out, bclk, mclk_div);
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#if !defined CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE
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2008-07-08 20:19:18 +08:00
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ret = snd_soc_dai_set_clkdiv(codec_dai, WM8510_BCLKDIV, bclk);
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2008-06-05 20:49:34 +08:00
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if (ret < 0) {
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pr_warning
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("playpaq_wm8510: Failed to set CODEC DAI BCLKDIV (%d)\n",
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ret);
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return ret;
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}
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#endif /* CONFIG_SND_AT32_SOC_PLAYPAQ_SLAVE */
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2008-07-08 20:19:18 +08:00
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ret = snd_soc_dai_set_pll(codec_dai, 0,
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2008-06-05 20:49:34 +08:00
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clk_get_rate(CODEC_CLK), pll_out);
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if (ret < 0) {
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pr_warning("playpaq_wm8510: Failed to set CODEC DAI PLL (%d)\n",
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ret);
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return ret;
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}
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2008-07-08 20:19:18 +08:00
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ret = snd_soc_dai_set_clkdiv(codec_dai, WM8510_MCLKDIV, mclk_div);
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2008-06-05 20:49:34 +08:00
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if (ret < 0) {
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pr_warning("playpaq_wm8510: Failed to set CODEC MCLKDIV (%d)\n",
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ret);
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return ret;
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}
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return 0;
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}
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static struct snd_soc_ops playpaq_wm8510_ops = {
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.hw_params = playpaq_wm8510_hw_params,
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};
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static const struct snd_soc_dapm_widget playpaq_dapm_widgets[] = {
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SND_SOC_DAPM_MIC("Int Mic", NULL),
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SND_SOC_DAPM_SPK("Ext Spk", NULL),
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};
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static const char *intercon[][3] = {
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/* speaker connected to SPKOUT */
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{"Ext Spk", NULL, "SPKOUTP"},
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{"Ext Spk", NULL, "SPKOUTN"},
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{"Mic Bias", NULL, "Int Mic"},
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{"MICN", NULL, "Mic Bias"},
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{"MICP", NULL, "Mic Bias"},
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/* Terminator */
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{NULL, NULL, NULL},
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};
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static int playpaq_wm8510_init(struct snd_soc_codec *codec)
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{
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int i;
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/*
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* Add DAPM widgets
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*/
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for (i = 0; i < ARRAY_SIZE(playpaq_dapm_widgets); i++)
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snd_soc_dapm_new_control(codec, &playpaq_dapm_widgets[i]);
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/*
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* Setup audio path interconnects
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*/
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for (i = 0; intercon[i][0] != NULL; i++) {
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snd_soc_dapm_connect_input(codec,
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intercon[i][0],
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intercon[i][1], intercon[i][2]);
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}
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2008-07-08 20:21:52 +08:00
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/* always connected pins */
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snd_soc_dapm_enable_pin(codec, "Int Mic");
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snd_soc_dapm_enable_pin(codec, "Ext Spk");
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snd_soc_dapm_sync(codec);
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2008-06-05 20:49:34 +08:00
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/* Make CSB show PLL rate */
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2008-07-08 20:21:52 +08:00
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snd_soc_dai_set_clkdiv(codec->dai, WM8510_OPCLKDIV,
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2008-06-05 20:49:34 +08:00
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WM8510_OPCLKDIV_1 | 4);
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return 0;
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}
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static struct snd_soc_dai_link playpaq_wm8510_dai = {
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.name = "WM8510",
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.stream_name = "WM8510 PCM",
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.cpu_dai = &at32_ssc_dai[0],
|
|
|
|
.codec_dai = &wm8510_dai,
|
|
|
|
.init = playpaq_wm8510_init,
|
|
|
|
.ops = &playpaq_wm8510_ops,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static struct snd_soc_machine snd_soc_machine_playpaq = {
|
|
|
|
.name = "LRS_PlayPaq_WM8510",
|
|
|
|
.dai_link = &playpaq_wm8510_dai,
|
|
|
|
.num_links = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static struct wm8510_setup_data playpaq_wm8510_setup = {
|
|
|
|
.i2c_address = 0x1a,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
static struct snd_soc_device playpaq_wm8510_snd_devdata = {
|
|
|
|
.machine = &snd_soc_machine_playpaq,
|
|
|
|
.platform = &at32_soc_platform,
|
|
|
|
.codec_dev = &soc_codec_dev_wm8510,
|
|
|
|
.codec_data = &playpaq_wm8510_setup,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device *playpaq_snd_device;
|
|
|
|
|
|
|
|
|
|
|
|
static int __init playpaq_asoc_init(void)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct at32_ssc_info *ssc_p = playpaq_wm8510_dai.cpu_dai->private_data;
|
|
|
|
struct ssc_device *ssc = NULL;
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Request SSC device
|
|
|
|
*/
|
|
|
|
ssc = ssc_request(0);
|
|
|
|
if (IS_ERR(ssc)) {
|
|
|
|
ret = PTR_ERR(ssc);
|
|
|
|
ssc = NULL;
|
|
|
|
goto err_ssc;
|
|
|
|
}
|
|
|
|
ssc_p->ssc = ssc;
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Configure MCLK for WM8510
|
|
|
|
*/
|
|
|
|
_gclk0 = clk_get(NULL, "gclk0");
|
|
|
|
if (IS_ERR(_gclk0)) {
|
|
|
|
_gclk0 = NULL;
|
|
|
|
goto err_gclk0;
|
|
|
|
}
|
|
|
|
_pll0 = clk_get(NULL, "pll0");
|
|
|
|
if (IS_ERR(_pll0)) {
|
|
|
|
_pll0 = NULL;
|
|
|
|
goto err_pll0;
|
|
|
|
}
|
|
|
|
if (clk_set_parent(_gclk0, _pll0)) {
|
|
|
|
pr_warning("snd-soc-playpaq: "
|
|
|
|
"Failed to set PLL0 as parent for DAC clock\n");
|
|
|
|
goto err_set_clk;
|
|
|
|
}
|
|
|
|
clk_set_rate(CODEC_CLK, 12000000);
|
|
|
|
clk_enable(CODEC_CLK);
|
|
|
|
|
|
|
|
#if defined CONFIG_AT32_ENHANCED_PORTMUX
|
|
|
|
at32_select_periph(MCLK_PIN, MCLK_PERIPH, 0);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Create and register platform device
|
|
|
|
*/
|
|
|
|
playpaq_snd_device = platform_device_alloc("soc-audio", 0);
|
|
|
|
if (playpaq_snd_device == NULL) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto err_device_alloc;
|
|
|
|
}
|
|
|
|
|
|
|
|
platform_set_drvdata(playpaq_snd_device, &playpaq_wm8510_snd_devdata);
|
|
|
|
playpaq_wm8510_snd_devdata.dev = &playpaq_snd_device->dev;
|
|
|
|
|
|
|
|
ret = platform_device_add(playpaq_snd_device);
|
|
|
|
if (ret) {
|
|
|
|
pr_warning("playpaq_wm8510: platform_device_add failed (%d)\n",
|
|
|
|
ret);
|
|
|
|
goto err_device_add;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
|
|
err_device_add:
|
|
|
|
if (playpaq_snd_device != NULL) {
|
|
|
|
platform_device_put(playpaq_snd_device);
|
|
|
|
playpaq_snd_device = NULL;
|
|
|
|
}
|
|
|
|
err_device_alloc:
|
|
|
|
err_set_clk:
|
|
|
|
if (_pll0 != NULL) {
|
|
|
|
clk_put(_pll0);
|
|
|
|
_pll0 = NULL;
|
|
|
|
}
|
|
|
|
err_pll0:
|
|
|
|
if (_gclk0 != NULL) {
|
|
|
|
clk_put(_gclk0);
|
|
|
|
_gclk0 = NULL;
|
|
|
|
}
|
|
|
|
err_gclk0:
|
|
|
|
if (ssc != NULL) {
|
|
|
|
ssc_free(ssc);
|
|
|
|
ssc = NULL;
|
|
|
|
}
|
|
|
|
err_ssc:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void __exit playpaq_asoc_exit(void)
|
|
|
|
{
|
|
|
|
struct at32_ssc_info *ssc_p = playpaq_wm8510_dai.cpu_dai->private_data;
|
|
|
|
struct ssc_device *ssc;
|
|
|
|
|
|
|
|
if (ssc_p != NULL) {
|
|
|
|
ssc = ssc_p->ssc;
|
|
|
|
if (ssc != NULL)
|
|
|
|
ssc_free(ssc);
|
|
|
|
ssc_p->ssc = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (_gclk0 != NULL) {
|
|
|
|
clk_put(_gclk0);
|
|
|
|
_gclk0 = NULL;
|
|
|
|
}
|
|
|
|
if (_pll0 != NULL) {
|
|
|
|
clk_put(_pll0);
|
|
|
|
_pll0 = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if defined CONFIG_AT32_ENHANCED_PORTMUX
|
|
|
|
at32_free_pin(MCLK_PIN);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
platform_device_unregister(playpaq_snd_device);
|
|
|
|
playpaq_snd_device = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(playpaq_asoc_init);
|
|
|
|
module_exit(playpaq_asoc_exit);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Geoffrey Wossum <gwossum@acm.org>");
|
|
|
|
MODULE_DESCRIPTION("ASoC machine driver for LRS PlayPaq");
|
|
|
|
MODULE_LICENSE("GPL");
|