perf_counter: powerpc: Change how processor-specific back-ends get selected
At present, the powerpc generic (processor-independent) perf_counter code has list of processor back-end modules, and at initialization, it looks at the PVR (processor version register) and has a switch statement to select a suitable processor-specific back-end. This is going to become inconvenient as we add more processor-specific back-ends, so this inverts the order: now each back-end checks whether it applies to the current processor, and registers itself if so. Furthermore, instead of looking at the PVR, back-ends now check the cur_cpu_spec->oprofile_cpu_type string and match on that. Lastly, each back-end now specifies a name for itself so the core can print a nice message when a back-end registers itself. This doesn't provide any support for unregistering back-ends, but that wouldn't be hard to do and would allow back-ends to be modules. Signed-off-by: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: linuxppc-dev@ozlabs.org Cc: benh@kernel.crashing.org LKML-Reference: <19000.55529.762227.518531@cargo.ozlabs.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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079b3c569c
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@ -21,6 +21,7 @@
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* describe the PMU on a particular POWER-family CPU.
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*/
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struct power_pmu {
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const char *name;
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int n_counter;
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int max_alternatives;
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unsigned long add_fields;
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@ -41,8 +42,6 @@ struct power_pmu {
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[PERF_COUNT_HW_CACHE_RESULT_MAX];
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};
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extern struct power_pmu *ppmu;
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/*
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* Values for power_pmu.flags
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*/
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@ -56,6 +55,8 @@ extern struct power_pmu *ppmu;
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#define PPMU_LIMITED_PMC_REQD 2 /* have to put this on a limited PMC */
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#define PPMU_ONLY_COUNT_RUN 4 /* only counting in run state */
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extern int register_power_pmu(struct power_pmu *);
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struct pt_regs;
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extern unsigned long perf_misc_flags(struct pt_regs *regs);
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extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
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@ -1214,42 +1214,14 @@ void hw_perf_counter_setup(int cpu)
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cpuhw->mmcr[0] = MMCR0_FC;
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}
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extern struct power_pmu power4_pmu;
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extern struct power_pmu ppc970_pmu;
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extern struct power_pmu power5_pmu;
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extern struct power_pmu power5p_pmu;
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extern struct power_pmu power6_pmu;
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extern struct power_pmu power7_pmu;
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static int init_perf_counters(void)
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int register_power_pmu(struct power_pmu *pmu)
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{
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unsigned long pvr;
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if (ppmu)
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return -EBUSY; /* something's already registered */
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/* XXX should get this from cputable */
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pvr = mfspr(SPRN_PVR);
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switch (PVR_VER(pvr)) {
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case PV_POWER4:
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case PV_POWER4p:
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ppmu = &power4_pmu;
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break;
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case PV_970:
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case PV_970FX:
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case PV_970MP:
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ppmu = &ppc970_pmu;
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break;
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case PV_POWER5:
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ppmu = &power5_pmu;
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break;
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case PV_POWER5p:
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ppmu = &power5p_pmu;
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break;
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case 0x3e:
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ppmu = &power6_pmu;
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break;
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case 0x3f:
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ppmu = &power7_pmu;
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break;
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}
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ppmu = pmu;
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pr_info("%s performance monitor hardware support registered\n",
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pmu->name);
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/*
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* Use FCHV to ignore kernel events if MSR.HV is set.
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@ -1259,5 +1231,3 @@ static int init_perf_counters(void)
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return 0;
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}
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arch_initcall(init_perf_counters);
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@ -10,7 +10,9 @@
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*/
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#include <linux/kernel.h>
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#include <linux/perf_counter.h>
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#include <linux/string.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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/*
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* Bits in event code for POWER4
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@ -587,7 +589,8 @@ static int power4_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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},
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};
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struct power_pmu power4_pmu = {
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static struct power_pmu power4_pmu = {
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.name = "POWER4/4+",
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.n_counter = 8,
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.max_alternatives = 5,
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.add_fields = 0x0000001100005555ul,
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@ -600,3 +603,13 @@ struct power_pmu power4_pmu = {
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.generic_events = p4_generic_events,
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.cache_events = &power4_cache_events,
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};
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static int init_power4_pmu(void)
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{
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if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power4"))
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return -ENODEV;
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return register_power_pmu(&power4_pmu);
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}
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arch_initcall(init_power4_pmu);
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@ -10,7 +10,9 @@
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*/
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#include <linux/kernel.h>
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#include <linux/perf_counter.h>
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#include <linux/string.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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/*
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* Bits in event code for POWER5+ (POWER5 GS) and POWER5++ (POWER5 GS DD3)
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@ -657,7 +659,8 @@ static int power5p_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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},
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};
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struct power_pmu power5p_pmu = {
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static struct power_pmu power5p_pmu = {
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.name = "POWER5+/++",
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.n_counter = 6,
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.max_alternatives = MAX_ALT,
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.add_fields = 0x7000000000055ul,
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@ -672,3 +675,14 @@ struct power_pmu power5p_pmu = {
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.generic_events = power5p_generic_events,
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.cache_events = &power5p_cache_events,
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};
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static int init_power5p_pmu(void)
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{
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if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5+")
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&& strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5++"))
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return -ENODEV;
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return register_power_pmu(&power5p_pmu);
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}
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arch_initcall(init_power5p_pmu);
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@ -10,7 +10,9 @@
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*/
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#include <linux/kernel.h>
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#include <linux/perf_counter.h>
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#include <linux/string.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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/*
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* Bits in event code for POWER5 (not POWER5++)
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@ -599,7 +601,8 @@ static int power5_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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},
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};
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struct power_pmu power5_pmu = {
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static struct power_pmu power5_pmu = {
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.name = "POWER5",
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.n_counter = 6,
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.max_alternatives = MAX_ALT,
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.add_fields = 0x7000090000555ul,
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@ -612,3 +615,13 @@ struct power_pmu power5_pmu = {
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.generic_events = power5_generic_events,
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.cache_events = &power5_cache_events,
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};
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static int init_power5_pmu(void)
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{
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if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5"))
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return -ENODEV;
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return register_power_pmu(&power5_pmu);
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}
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arch_initcall(init_power5_pmu);
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@ -10,7 +10,9 @@
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*/
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#include <linux/kernel.h>
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#include <linux/perf_counter.h>
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#include <linux/string.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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/*
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* Bits in event code for POWER6
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@ -516,7 +518,8 @@ static int power6_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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},
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};
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struct power_pmu power6_pmu = {
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static struct power_pmu power6_pmu = {
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.name = "POWER6",
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.n_counter = 6,
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.max_alternatives = MAX_ALT,
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.add_fields = 0x1555,
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@ -531,3 +534,13 @@ struct power_pmu power6_pmu = {
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.generic_events = power6_generic_events,
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.cache_events = &power6_cache_events,
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};
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static int init_power6_pmu(void)
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{
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if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power6"))
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return -ENODEV;
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return register_power_pmu(&power6_pmu);
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}
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arch_initcall(init_power6_pmu);
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@ -10,7 +10,9 @@
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*/
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#include <linux/kernel.h>
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#include <linux/perf_counter.h>
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#include <linux/string.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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/*
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* Bits in event code for POWER7
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@ -346,7 +348,8 @@ static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
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},
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};
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struct power_pmu power7_pmu = {
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static struct power_pmu power7_pmu = {
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.name = "POWER7",
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.n_counter = 6,
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.max_alternatives = MAX_ALT + 1,
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.add_fields = 0x1555ul,
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@ -359,3 +362,13 @@ struct power_pmu power7_pmu = {
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.generic_events = power7_generic_events,
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.cache_events = &power7_cache_events,
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};
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static int init_power7_pmu(void)
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{
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if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power7"))
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return -ENODEV;
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return register_power_pmu(&power7_pmu);
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}
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arch_initcall(init_power7_pmu);
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@ -10,7 +10,9 @@
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*/
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#include <linux/string.h>
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#include <linux/perf_counter.h>
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#include <linux/string.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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/*
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* Bits in event code for PPC970
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},
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};
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struct power_pmu ppc970_pmu = {
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static struct power_pmu ppc970_pmu = {
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.name = "PPC970/FX/MP",
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.n_counter = 8,
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.max_alternatives = 2,
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.add_fields = 0x001100005555ull,
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.generic_events = ppc970_generic_events,
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.cache_events = &ppc970_cache_events,
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};
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static int init_ppc970_pmu(void)
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{
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if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970")
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&& strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970MP"))
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return -ENODEV;
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return register_power_pmu(&ppc970_pmu);
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}
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arch_initcall(init_ppc970_pmu);
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