cxgb4vf: Add code to provision T4 PCI-E SR-IOV Virtual Functions with hardware resources
Add code to provision T4 PCI-E SR-IOV Virtual Functions with hardware resources. Signed-off-by: Casey Leedom Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -77,6 +77,76 @@
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*/
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#define MAX_SGE_TIMERVAL 200U
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#ifdef CONFIG_PCI_IOV
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/*
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* Virtual Function provisioning constants. We need two extra Ingress Queues
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* with Interrupt capability to serve as the VF's Firmware Event Queue and
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* Forwarded Interrupt Queue (when using MSI mode) -- neither will have Free
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* Lists associated with them). For each Ethernet/Control Egress Queue and
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* for each Free List, we need an Egress Context.
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*/
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enum {
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VFRES_NPORTS = 1, /* # of "ports" per VF */
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VFRES_NQSETS = 2, /* # of "Queue Sets" per VF */
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VFRES_NVI = VFRES_NPORTS, /* # of Virtual Interfaces */
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VFRES_NETHCTRL = VFRES_NQSETS, /* # of EQs used for ETH or CTRL Qs */
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VFRES_NIQFLINT = VFRES_NQSETS+2,/* # of ingress Qs/w Free List(s)/intr */
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VFRES_NIQ = 0, /* # of non-fl/int ingress queues */
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VFRES_NEQ = VFRES_NQSETS*2, /* # of egress queues */
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VFRES_TC = 0, /* PCI-E traffic class */
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VFRES_NEXACTF = 16, /* # of exact MPS filters */
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VFRES_R_CAPS = FW_CMD_CAP_DMAQ|FW_CMD_CAP_VF|FW_CMD_CAP_PORT,
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VFRES_WX_CAPS = FW_CMD_CAP_DMAQ|FW_CMD_CAP_VF,
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};
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/*
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* Provide a Port Access Rights Mask for the specified PF/VF. This is very
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* static and likely not to be useful in the long run. We really need to
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* implement some form of persistent configuration which the firmware
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* controls.
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*/
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static unsigned int pfvfres_pmask(struct adapter *adapter,
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unsigned int pf, unsigned int vf)
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{
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unsigned int portn, portvec;
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/*
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* Give PF's access to all of the ports.
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*/
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if (vf == 0)
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return FW_PFVF_CMD_PMASK_MASK;
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/*
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* For VFs, we'll assign them access to the ports based purely on the
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* PF. We assign active ports in order, wrapping around if there are
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* fewer active ports than PFs: e.g. active port[pf % nports].
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* Unfortunately the adapter's port_info structs haven't been
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* initialized yet so we have to compute this.
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*/
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if (adapter->params.nports == 0)
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return 0;
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portn = pf % adapter->params.nports;
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portvec = adapter->params.portvec;
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for (;;) {
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/*
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* Isolate the lowest set bit in the port vector. If we're at
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* the port number that we want, return that as the pmask.
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* otherwise mask that bit out of the port vector and
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* decrement our port number ...
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*/
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unsigned int pmask = portvec ^ (portvec & (portvec-1));
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if (portn == 0)
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return pmask;
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portn--;
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portvec &= ~pmask;
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}
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/*NOTREACHED*/
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}
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#endif
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enum {
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MEMWIN0_APERTURE = 65536,
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MEMWIN0_BASE = 0x30000,
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@ -2925,6 +2995,42 @@ static int adap_init0(struct adapter *adap)
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t4_read_mtu_tbl(adap, adap->params.mtus, NULL);
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t4_load_mtus(adap, adap->params.mtus, adap->params.a_wnd,
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adap->params.b_wnd);
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#ifdef CONFIG_PCI_IOV
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/*
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* Provision resource limits for Virtual Functions. We currently
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* grant them all the same static resource limits except for the Port
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* Access Rights Mask which we're assigning based on the PF. All of
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* the static provisioning stuff for both the PF and VF really needs
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* to be managed in a persistent manner for each device which the
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* firmware controls.
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*/
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{
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int pf, vf;
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for (pf = 0; pf < ARRAY_SIZE(num_vf); pf++) {
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if (num_vf[pf] <= 0)
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continue;
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/* VF numbering starts at 1! */
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for (vf = 1; vf <= num_vf[pf]; vf++) {
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ret = t4_cfg_pfvf(adap, 0, pf, vf,
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VFRES_NEQ, VFRES_NETHCTRL,
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VFRES_NIQFLINT, VFRES_NIQ,
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VFRES_TC, VFRES_NVI,
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FW_PFVF_CMD_CMASK_MASK,
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pfvfres_pmask(adap, pf, vf),
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VFRES_NEXACTF,
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VFRES_R_CAPS, VFRES_WX_CAPS);
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if (ret < 0)
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dev_warn(adap->pdev_dev, "failed to "
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"provision pf/vf=%d/%d; "
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"err=%d\n", pf, vf, ret);
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}
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}
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}
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#endif
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return 0;
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/*
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