firewire: Fix start on cycle 0 for IT, implement start on cycle for IR.
Signed-off-by: Kristian Høgsberg <krh@redhat.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
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@ -1362,28 +1362,32 @@ static int ohci_start_iso(struct fw_iso_context *base,
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{
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struct iso_context *ctx = container_of(base, struct iso_context, base);
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struct fw_ohci *ohci = ctx->context.ohci;
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u32 cycle_match = 0;
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u32 control, match;
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int index;
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if (ctx->base.type == FW_ISO_CONTEXT_TRANSMIT) {
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index = ctx - ohci->it_context_list;
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if (cycle > 0)
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cycle_match = IT_CONTEXT_CYCLE_MATCH_ENABLE |
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match = 0;
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if (cycle >= 0)
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match = IT_CONTEXT_CYCLE_MATCH_ENABLE |
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(cycle & 0x7fff) << 16;
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reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index);
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reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index);
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context_run(&ctx->context, cycle_match);
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context_run(&ctx->context, match);
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} else {
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index = ctx - ohci->ir_context_list;
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control = IR_CONTEXT_DUAL_BUFFER_MODE | IR_CONTEXT_ISOCH_HEADER;
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match = (tags << 28) | (sync << 8) | ctx->base.channel;
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if (cycle >= 0) {
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match |= (cycle & 0x07fff) << 12;
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control |= IR_CONTEXT_CYCLE_MATCH_ENABLE;
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}
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reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index);
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reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index);
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reg_write(ohci, context_match(ctx->context.regs),
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(tags << 28) | (sync << 8) | ctx->base.channel);
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context_run(&ctx->context,
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IR_CONTEXT_DUAL_BUFFER_MODE |
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IR_CONTEXT_ISOCH_HEADER);
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reg_write(ohci, context_match(ctx->context.regs), match);
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context_run(&ctx->context, control);
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}
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return 0;
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