[WATCHDOG] i6300esb.patch
I wrote earlier to the list[1] asking for a driver for the watchdog included in the 6300ESB chipset. I got a 2.4 driver via private email from Ross Biro which I've changed into what I hope resembles a 2.6 driver (which was done by looking a lot at the watchdog drivers already in the 2.6 tree). I've attached the result, and I'm hoping to get some feedback on the coding as a first step. I can't actually test it on the hardware right now as I won't have physical access until April. So my own tests have been limited to "compiles-without-warnings" and "can-be-insmodded-in-other-machine-without-oops". [1] http://marc.theaimsgroup.com/?l=linux-kernel&m=110711079825794&w=2 [2] http://marc.theaimsgroup.com/?l=linux-kernel&m=110711973917746&w=2 Signed-off-by: David Hardeman <david@2gen.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
David Hardeman
Wim Van Sebroeck
parent
3be10211ab
commit
cc90ef0f9b
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@ -234,6 +234,16 @@ config WAFER_WDT
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To compile this driver as a module, choose M here: the
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module will be called wafer5823wdt.
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config I6300ESB_WDT
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tristate "Intel 6300ESB Timer/Watchdog"
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depends on WATCHDOG && X86 && PCI
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---help---
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Hardware driver for the watchdog timer built into the Intel
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6300ESB controller hub.
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To compile this driver as a module, choose M here: the
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module will be called i6300esb.
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config I8XX_TCO
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tristate "Intel i8xx TCO Timer/Watchdog"
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depends on WATCHDOG && (X86 || IA64) && PCI
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@ -39,6 +39,7 @@ obj-$(CONFIG_SC520_WDT) += sc520_wdt.o
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obj-$(CONFIG_EUROTECH_WDT) += eurotechwdt.o
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obj-$(CONFIG_IB700_WDT) += ib700wdt.o
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obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o
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obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o
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obj-$(CONFIG_I8XX_TCO) += i8xx_tco.o
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obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
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obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o
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@ -0,0 +1,508 @@
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/*
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* i6300esb 0.03: Watchdog timer driver for Intel 6300ESB chipset
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*
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* (c) Copyright 2004 Google Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* based on i810-tco.c which is
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*
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* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
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* developed for
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* Jentro AG, Haar/Munich (Germany)
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*
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* which is in turn based on softdog.c by Alan Cox <alan@redhat.com>
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*
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* The timer is implemented in the following I/O controller hubs:
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* (See the intel documentation on http://developer.intel.com.)
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* 6300ESB chip : document number 300641-003
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*
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* 2004YYZZ Ross Biro
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* Initial version 0.01
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* 2004YYZZ Ross Biro
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* Version 0.02
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* 20050210 David Härdeman <david@2gen.com>
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* Ported driver to kernel 2.6
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*/
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/*
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* Includes, defines, variables, module parameters, ...
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include "i6300esb.h"
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/* Module and version information */
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#define ESB_VERSION "0.03"
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#define ESB_MODULE_NAME "i6300ESB timer"
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#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
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#define PFX ESB_MODULE_NAME ": "
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/* internal variables */
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static void __iomem *BASEADDR;
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static spinlock_t esb_lock; /* Guards the hardware */
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static unsigned long timer_alive;
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static struct pci_dev *esb_pci;
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static unsigned short triggered; /* The status of the watchdog upon boot */
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static char esb_expect_close;
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/* module parameters */
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#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (1<heartbeat<2*1023) */
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static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
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#ifdef CONFIG_WATCHDOG_NOWAYOUT
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static int nowayout = 1;
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#else
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static int nowayout = 0;
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#endif
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
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/*
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* Some i6300ESB specific functions
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*/
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/*
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* Prepare for reloading the timer by unlocking the proper registers.
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* This is performed by first writing 0x80 followed by 0x86 to the
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* reload register. After this the appropriate registers can be written
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* to once before they need to be unlocked again.
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*/
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static inline void esb_unlock_registers(void) {
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writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
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writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
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}
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static void esb_timer_start(void)
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{
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u8 val;
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/* Enable or Enable + Lock? */
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val = 0x02 | nowayout ? 0x01 : 0x00;
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pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
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}
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static int esb_timer_stop(void)
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{
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u8 val;
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spin_lock(&esb_lock);
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/* First, reset timers as suggested by the docs */
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esb_unlock_registers();
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writew(0x10, ESB_RELOAD_REG);
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/* Then disable the WDT */
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pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
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pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
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spin_unlock(&esb_lock);
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/* Returns 0 if the timer was disabled, non-zero otherwise */
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return (val & 0x01);
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}
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static void esb_timer_keepalive(void)
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{
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spin_lock(&esb_lock);
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esb_unlock_registers();
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writew(0x10, ESB_RELOAD_REG);
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/* FIXME: Do we need to flush anything here? */
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spin_unlock(&esb_lock);
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}
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static int esb_timer_set_heartbeat(int time)
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{
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u32 val;
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if (time < 0x1 || time > (2 * 0x03ff))
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return -EINVAL;
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spin_lock(&esb_lock);
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/* We shift by 9, so if we are passed a value of 1 sec,
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* val will be 1 << 9 = 512, then write that to two
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* timers => 2 * 512 = 1024 (which is decremented at 1KHz)
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*/
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val = time << 9;
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/* Write timer 1 */
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esb_unlock_registers();
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writel(val, ESB_TIMER1_REG);
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/* Write timer 2 */
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esb_unlock_registers();
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writel(val, ESB_TIMER2_REG);
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/* Reload */
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esb_unlock_registers();
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writew(0x10, ESB_RELOAD_REG);
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/* FIXME: Do we need to flush everything out? */
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/* Done */
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heartbeat = time;
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spin_unlock(&esb_lock);
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return 0;
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}
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static int esb_timer_read (void)
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{
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u32 count;
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/* This isn't documented, and doesn't take into
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* acount which stage is running, but it looks
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* like a 20 bit count down, so we might as well report it.
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*/
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pci_read_config_dword(esb_pci, 0x64, &count);
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return (int)count;
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}
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/*
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* /dev/watchdog handling
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*/
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static int esb_open (struct inode *inode, struct file *file)
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{
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/* /dev/watchdog can only be opened once */
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if (test_and_set_bit(0, &timer_alive))
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return -EBUSY;
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/* Reload and activate timer */
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esb_timer_keepalive ();
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esb_timer_start ();
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return nonseekable_open(inode, file);
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}
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static int esb_release (struct inode *inode, struct file *file)
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{
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/* Shut off the timer. */
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if (esb_expect_close == 42) {
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esb_timer_stop ();
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} else {
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printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
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esb_timer_keepalive ();
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}
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clear_bit(0, &timer_alive);
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esb_expect_close = 0;
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return 0;
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}
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static ssize_t esb_write (struct file *file, const char __user *data,
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size_t len, loff_t * ppos)
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{
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/* See if we got the magic character 'V' and reload the timer */
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if (len) {
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if (!nowayout) {
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size_t i;
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/* note: just in case someone wrote the magic character
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* five months ago... */
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esb_expect_close = 0;
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/* scan to see whether or not we got the magic character */
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for (i = 0; i != len; i++) {
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char c;
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if(get_user(c, data+i))
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return -EFAULT;
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if (c == 'V')
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esb_expect_close = 42;
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}
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}
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/* someone wrote to us, we should reload the timer */
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esb_timer_keepalive ();
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}
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return len;
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}
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static int esb_ioctl (struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int new_options, retval = -EINVAL;
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int new_heartbeat;
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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static struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.firmware_version = 0,
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.identity = ESB_MODULE_NAME,
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};
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &ident,
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sizeof (ident)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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return put_user (esb_timer_read(), p);
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case WDIOC_GETBOOTSTATUS:
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return put_user (triggered, p);
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case WDIOC_KEEPALIVE:
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esb_timer_keepalive ();
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return 0;
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case WDIOC_SETOPTIONS:
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{
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if (get_user (new_options, p))
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return -EFAULT;
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if (new_options & WDIOS_DISABLECARD) {
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esb_timer_stop ();
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retval = 0;
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}
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if (new_options & WDIOS_ENABLECARD) {
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esb_timer_keepalive ();
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esb_timer_start ();
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retval = 0;
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}
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return retval;
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}
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case WDIOC_SETTIMEOUT:
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{
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if (get_user(new_heartbeat, p))
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return -EFAULT;
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if (esb_timer_set_heartbeat(new_heartbeat))
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return -EINVAL;
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esb_timer_keepalive ();
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/* Fall */
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}
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case WDIOC_GETTIMEOUT:
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return put_user(heartbeat, p);
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default:
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return -ENOIOCTLCMD;
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}
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}
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/*
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* Notify system
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*/
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static int esb_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
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{
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if (code==SYS_DOWN || code==SYS_HALT) {
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/* Turn the WDT off */
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esb_timer_stop ();
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}
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return NOTIFY_DONE;
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}
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/*
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* Kernel Interfaces
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*/
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static struct file_operations esb_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = esb_write,
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.ioctl = esb_ioctl,
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.open = esb_open,
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.release = esb_release,
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};
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static struct miscdevice esb_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &esb_fops,
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};
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static struct notifier_block esb_notifier = {
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.notifier_call = esb_notify_sys,
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};
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/*
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* Data for PCI driver interface
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*
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* This data only exists for exporting the supported
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* PCI ids via MODULE_DEVICE_TABLE. We do not actually
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* register a pci_driver, because someone else might one day
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* want to register another driver on the same PCI id.
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*/
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static struct pci_device_id esb_pci_tbl[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9, PCI_ANY_ID, PCI_ANY_ID, },
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{ 0, }, /* End of list */
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};
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MODULE_DEVICE_TABLE (pci, esb_pci_tbl);
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/*
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* Init & exit routines
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*/
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static unsigned char __init esb_getdevice (void)
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{
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u8 val1;
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unsigned short val2;
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struct pci_dev *dev = NULL;
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/*
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* Find the PCI device
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*/
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while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
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if (pci_match_device(esb_pci_tbl, dev)) {
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esb_pci = dev;
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break;
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}
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}
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if (esb_pci) {
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if (pci_enable_device(esb_pci)) {
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printk (KERN_ERR PFX "failed to enable device\n");
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goto out;
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}
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if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
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printk (KERN_ERR PFX "failed to request region\n");
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goto err_disable;
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}
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BASEADDR = ioremap(pci_resource_start(esb_pci, 0),
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pci_resource_len(esb_pci, 0));
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if (BASEADDR == NULL) {
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/* Something's wrong here, BASEADDR has to be set */
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printk (KERN_ERR PFX "failed to get BASEADDR\n");
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goto err_release;
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}
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/*
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* The watchdog has two timers, it can be setup so that the
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* expiry of timer1 results in an interrupt and the expiry of
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* timer2 results in a reboot. We set it to not generate
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* any interrupts as there is not much we can do with it
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* right now.
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*
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* We also enable reboots and set the timer frequency to
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* the PCI clock divided by 2^15 (approx 1KHz).
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*/
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pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
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/* Check that the WDT isn't already locked */
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pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
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if (val1 & ESB_WDT_LOCK)
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printk (KERN_WARNING PFX "nowayout already set\n");
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/* Set the timer to watchdog mode and disable it for now */
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pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
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/* Check if the watchdog was previously triggered */
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esb_unlock_registers();
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val2 = readw(ESB_RELOAD_REG);
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triggered = (val2 & (0x01 << 9) >> 9);
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/* Reset trigger flag and timers */
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esb_unlock_registers();
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writew((0x11 << 8), ESB_RELOAD_REG);
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/* Done */
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return 1;
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err_release:
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pci_release_region(esb_pci, 0);
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err_disable:
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pci_disable_device(esb_pci);
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}
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out:
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return 0;
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}
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static int __init watchdog_init (void)
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{
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int ret;
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spin_lock_init(&esb_lock);
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/* Check whether or not the hardware watchdog is there */
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if (!esb_getdevice () || esb_pci == NULL)
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return -ENODEV;
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/* Check that the heartbeat value is within it's range ; if not reset to the default */
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if (esb_timer_set_heartbeat (heartbeat)) {
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esb_timer_set_heartbeat (WATCHDOG_HEARTBEAT);
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printk(KERN_INFO PFX "heartbeat value must be 1<heartbeat<2046, using %d\n",
|
||||
heartbeat);
|
||||
}
|
||||
|
||||
ret = register_reboot_notifier(&esb_notifier);
|
||||
if (ret != 0) {
|
||||
printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
|
||||
ret);
|
||||
goto err_unmap;
|
||||
}
|
||||
|
||||
ret = misc_register(&esb_miscdev);
|
||||
if (ret != 0) {
|
||||
printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
|
||||
WATCHDOG_MINOR, ret);
|
||||
goto err_notifier;
|
||||
}
|
||||
|
||||
esb_timer_stop ();
|
||||
|
||||
printk (KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
|
||||
BASEADDR, heartbeat, nowayout);
|
||||
|
||||
return 0;
|
||||
|
||||
err_notifier:
|
||||
unregister_reboot_notifier(&esb_notifier);
|
||||
err_unmap:
|
||||
iounmap(BASEADDR);
|
||||
/* err_release: */
|
||||
pci_release_region(esb_pci, 0);
|
||||
/* err_disable: */
|
||||
pci_disable_device(esb_pci);
|
||||
/* out: */
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit watchdog_cleanup (void)
|
||||
{
|
||||
/* Stop the timer before we leave */
|
||||
if (!nowayout)
|
||||
esb_timer_stop ();
|
||||
|
||||
/* Deregister */
|
||||
misc_deregister(&esb_miscdev);
|
||||
unregister_reboot_notifier(&esb_notifier);
|
||||
iounmap(BASEADDR);
|
||||
pci_release_region(esb_pci, 0);
|
||||
pci_disable_device(esb_pci);
|
||||
}
|
||||
|
||||
module_init(watchdog_init);
|
||||
module_exit(watchdog_cleanup);
|
||||
|
||||
MODULE_AUTHOR("Ross Biro and David Härdeman");
|
||||
MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
/*
|
||||
* i6300esb: Watchdog timer driver for Intel 6300ESB chipset
|
||||
*
|
||||
* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
|
||||
* http://www.kernelconcepts.de
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* Neither kernel concepts nor Nils Faerber admit liability nor provide
|
||||
* warranty for any of this software. This material is provided
|
||||
* "AS-IS" and at no charge.
|
||||
*
|
||||
* (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
|
||||
* developed for
|
||||
* Jentro AG, Haar/Munich (Germany)
|
||||
*
|
||||
* TCO timer driver for i8xx chipsets
|
||||
* based on softdog.c by Alan Cox <alan@redhat.com>
|
||||
*
|
||||
* For history and the complete list of supported I/O Controller Hub's
|
||||
* see i8xx_tco.c
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* Some address definitions for the TCO
|
||||
*/
|
||||
|
||||
/* PCI configuration registers */
|
||||
#define ESB_CONFIG_REG 0x60 /* Config register */
|
||||
#define ESB_LOCK_REG 0x68 /* WDT lock register */
|
||||
|
||||
/* Memory mapped registers */
|
||||
#define ESB_TIMER1_REG BASEADDR + 0x00 /* Timer1 value after each reset */
|
||||
#define ESB_TIMER2_REG BASEADDR + 0x04 /* Timer2 value after each reset */
|
||||
#define ESB_GINTSR_REG BASEADDR + 0x08 /* General Interrupt Status Register */
|
||||
#define ESB_RELOAD_REG BASEADDR + 0x0c /* Reload register */
|
||||
|
||||
|
||||
/*
|
||||
* Some register bits
|
||||
*/
|
||||
|
||||
/* Lock register bits */
|
||||
#define ESB_WDT_FUNC ( 0x01 << 2 ) /* Watchdog functionality */
|
||||
#define ESB_WDT_ENABLE ( 0x01 << 1 ) /* Enable WDT */
|
||||
#define ESB_WDT_LOCK ( 0x01 << 0 ) /* Lock (nowayout) */
|
||||
|
||||
/* Config register bits */
|
||||
#define ESB_WDT_REBOOT ( 0x01 << 5 ) /* Enable reboot on timeout */
|
||||
#define ESB_WDT_FREQ ( 0x01 << 2 ) /* Decrement frequency */
|
||||
#define ESB_WDT_INTTYPE ( 0x11 << 0 ) /* Interrupt type on timer1 timeout */
|
||||
|
||||
|
||||
/*
|
||||
* Some magic constants
|
||||
*/
|
||||
#define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
|
||||
#define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
|
||||
Loading…
Reference in New Issue