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3 Commits

Author SHA1 Message Date
Atsushi Nemoto 0751752922 [MIPS] TXx9: Add some pci options 
Add pci options for backplane type, clock selection, error handling,
timeout values.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2008-07-30 21:54:38 +01:00
Atsushi Nemoto edcaf1a6a7 [MIPS] TXx9: Make single kernel can support multiple boards 
Make single kernel can be used on RBTX4927/37/38.  Also make
some SoC-specific code independent from board-specific code.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2008-07-15 18:44:35 +01:00
Atsushi Nemoto 89d63fe179 [MIPS] TXx9: Reorganize PCI code 
Split out PCIC dependent code and SoC dependent code from board dependent
code.  Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code.
Also fix some build problems on CONFIG_PCI=n.

As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards
and PCI66 support is available for all TX49 boards.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2008-07-15 18:44:35 +01:00