Commit Graph

10 Commits

Author SHA1 Message Date
Kukjin Kim ab10f1dd91 Merge branch 'dev/cleanup-clocks' into for-next 2011-01-05 09:39:23 +09:00
Kukjin Kim 1526631d02 ARM: S5P6450: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-01-04 18:27:43 +09:00
Kukjin Kim 5ed76f3d98 Merge branch 'next-s5p64x0' into for-next-new 2010-12-30 10:44:53 +09:00
Atul Dahiya 232d10061c ARM: S5P64X0: Add clock support for RTC
This patch adds RTC clock for S5P6450.

Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Jassi Brar 6cb26da820 ARM: S5P6450: Define clocks for I2S
Define missing controller clocks for the I2S-0,1 blocks.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:24:19 +09:00
Jassi Brar d9a93c345a ARM: S5P64X0: Upgrade platform device for I2S
Add more information to I2S platform_devices in order
to prepare them for new controller driver.
Also, discard duplicated gpio-cfg.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-11-19 08:49:44 +09:00
Seungwhan Youn b05d85350c ARM: S5P64X0: Set DMA clock disable as default
This patch modify to DMA operation clock into disable list for default
clock setting.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:10:42 +09:00
Seungwhan Youn 9616674a35 ARM: S5P: Add EPLL rate change warning
This patch adds warning about changing EPLL rate to notice that other
driver that controls H/W, which is using EPLL, will has unknown effects
by this EPLL rate change.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:06:13 +09:00
Seungwhan Youn d4b34c6c84 ARM: S5P: Reduce duplicated EPLL control codes
S5P Samsung SoCs has a EPLL to support various PLL clock sources for other
H/W blocks. Until now, to control EPLL, each of SoCs make their own functions
in 'mach-s5pxxx/clock.c'. But some of functions, 'xxx_epll_get_rate()' and
'xxx_epll_enable()', are exactly same in all S5P SoCs, so this patch move
these duplicated codes to common EPLL functions that use platform wide.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:05:56 +09:00
Kukjin Kim 3109e55099 ARM: S5P64X0: Update Clock for S5P6440 and S5P6450
This patch updates regarding clock files for supporting S5P6440 and
S5P6450 with one kernel image. The mach-s5p64x0/clock.c is for common
of them and there are specific clock files for each SoCs.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-18 18:33:02 +09:00