This fixes a long-standing FIXME for G2 DMA, where we finally
wire up the IRQ handler and allow for sampling remaining bytes
while in-flight.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds the VoyagerGX UART to the RTS7751R2D setup
code, and cleans up a few build issues.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Inhibit mapping through page tables in __ioremap() for PCI memory
apertures on SH7751 and SH7780-style PCI controllers, translation is
not possible for these areas. For other users that map a small window
in P1/P2 space, ioremap() traps that already, and should never make
it to __ioremap().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This cleans up quite a lot of the PCI mess that we
currently have, and attempts to consolidate the
duplication in the SH7780 and SH7751 PCI controllers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some kgdb cleanup. Move hexchars/highhex/lowhex to the header, so it can
be reused by sh-sci. Also drop silly ctrl_inl/outl() overloading being
done by the kgdb stub.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds some simple PM stubs and the basic APM interfaces,
primarily for use by hp6xx, where the existing userland
expects it.
Signed-off-by: Andriy Skulysh <askulysh@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Rewrite the store queue API for a per-cpu interface in the driver
model. The old miscdevice is dropped, due to TASK_SIZE limitations,
and no one was using it anyways.
Carve up and allocate store queue space with a bitmap, back sq
mapping objects with a slab cache, and let userspace worry about
its own prefetching.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There was a bug that got introduced when the split ptlock changes
went in where mm could be unintialized for user mappings, this
fixes it up..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
ioremap() overhaul. Add support for transparent PMB mapping, get rid of
p3_ioremap(), etc. Also drop ioremap() and iounmap() routines from the
machvec, as everyone can use the generic ioremap() API instead. For PCI
memory apertures and other special cases, use the pci_iomap() API, as
boards are already required to get the mapping right there.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Cleanup of page table allocators, using generic folded PMD and PUD
helpers. TLB flushing operations are moved to a more sensible spot.
The page fault handler is also optimized slightly, we no longer waste
cycles on IRQ disabling for flushing of the page from the ITLB, since
we're already under CLI protection by the initial exception handler.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
A synco is needed before we jump to start_kernel().
While we're at it, also move the sh_cpu_init() jump until after
we've zeroed BSS, as this has caused some undesirable results
in sh_cpu_init().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Currently when making changes to control registers, we
typically need some time for changes to take effect (8
nops, generally). However, for sh4a we simply need to
do an icbi..
This is a simple patch for implementing a general purpose
ctrl_barrier() which functions as a control register write
barrier. There's some additional documentation in the patch
itself, but it's pretty self explanatory.
There were also some places where we were not doing the
barrier, which didn't seem to have any adverse effects on
legacy parts, but certainly did on sh4a. It's safer to have
the barrier in place for legacy parts as well in these cases,
though this does make flush_tlb_all() more expensive (by an
order of 8 nops). We can ifdef around the flush_tlb_all()
case for now if it's clear that all legacy parts won't have
a problem with this.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There's a bug in the Hitachi SuperH csum_partial_copy_generic()
implementation. If the supplied length is 1 (and several alignment
conditions are met), the function immediately branches to label 4.
However, the assembly at label 4 expects the length to be stored in
register r2. Since this has not occurred, subsequent behavior is
undefined.
This can cause bad payload checksums in TCP connections.
I've fixed the problem by initializing register r2 prior to the branch
instruction.
Signed-off-by: Ollie Wild <aaw@rincewind.tv>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We had a pretty interesting oops happening, where copy_user_page()
was down()'ing p3map_sem[] with a bogus offset (particularly, an
offset that hadn't been initialized with sema_init(), due to the
mismatch between cpu_data->dcache.n_aliases and what was assumed
based off of the old CACHE_ALIAS value).
Luckily, spinlock debugging caught this for us, and so we drop
the old hardcoded CACHE_ALIAS for sh4 completely and rely on the
run-time probed cpu_data->dcache.alias_mask. This in turn gets
the p3map_sem[] index right, and everything works again.
While we're at it, also convert to 4-level page tables..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Allow multiple early printk consoles via earlyprintk=.
With this change earlyprintk is no longer enabled by default,
it must be specified on the kernel command line. Optionally
with ,keep to prevent unreg by tty_io.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Minor sign-extension bug in SH-specific memset()..
Signed-off-by: Toshinobu Sugioka <sugioka@itonet.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This reworks some of the SH-4 cache handling code to more easily
accomodate newer-style caches (particularly for the > direct-mapped
case), as well as optimizing some of the old code.
Signed-off-by: Richard Curnow <richard.curnow@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Various cleanups for HS7751RVoIP. Mostly just getting
rid of the old mach.c and splitting codec configuration
in to its own Kconfig.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
With the I/O rework for hd64461 we're down to a single header,
so move it by itself and get rid of the directory.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some of these have suffered some bitrot, and so there is
some degree of dead code that has been left sitting around,
clean it up..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
For some of the larger sizes we permitted spanning pages
across several PTEs, but this turned out to not be generally
useful. This reverts the sh hugetlbpage interface to something
more sensible using huge pages at single PTE granularity.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some minor cleanups for the updated consolidated hp6xx
mach-type.
Signed-off-by: Andriy Skulysh <askulysh@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We had quite a bit of whitespace damage, clean most of it up..
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
These were previously sprinkled in machine_power_off(),
though missed being updated when the rest of the boards
switched over.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We had a special .stack section in the ld script that
was being used to position r15 initially. This is
nonsensical, as we can just use a THREAD_SIZE offset
from the init_thread_union instead (as every other arch
does).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
in_nmi shifted down a few labels, so we were inadvertently
clearing the lower byte of do_syscall_trace, badness ensues.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Move the syscall table in to its own file, as per sh64. The entry.S
bits will end up being considerably different in the sh2/sh2a cases,
so this lets us keep things in sync somewhat..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
flush_cache_range() wasn't page aligning the end of the range,
we can't assume that it will always be page aligned, and we
ended up getting unaligned faults in some rare call paths.
Additionally, we add a small optimization to just purge the
dcache entirely if the range is large enough that the page
table walking will take longer. We use an arbitrary value of
64 pages for the large range size, as per sh64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
One of the changes necessary for shared page tables is to standardize the
pxx_page macros. pte_page and pmd_page have always returned the struct
page associated with their entry, while pte_page_kernel and pmd_page_kernel
have returned the kernel virtual address. pud_page and pgd_page, on the
other hand, return the kernel virtual address.
Shared page tables needs pud_page and pgd_page to return the actual page
structures. There are very few actual users of these functions, so it is
simple to standardize their usage.
Since this is basic cleanup, I am submitting these changes as a standalone
patch. Per Hugh Dickins' comments about it, I am also changing the
pxx_page_kernel macros to pxx_page_vaddr to clarify their meaning.
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Cc: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Cleanup for user headers, as noted:
asm-sh/page.h requires asm-generic/memory_model.h, which does not exist in exported headers
asm-sh/ptrace.h requires asm/ubc.h, which does not exist in exported headers
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Paul Mundt
Andriy Skulysh
Jamie Lenehan
kogiidena
Ollie Wild
Toshinobu Sugioka
Richard Curnow
Dave McCracken