This patch moves the vdso's to arch/powerpc, adds support for the 32
bits vdso to the 32 bits kernel, rename systemcfg (finally !), and adds
some new (still untested) routines to both vdso's: clock_gettime() with
support for CLOCK_REALTIME and CLOCK_MONOTONIC, clock_getres() (same
clocks) and get_tbfreq() for glibc to retreive the timebase frequency.
Tom,Steve: The implementation of get_tbfreq() I've done for 32 bits
returns a long long (r3, r4) not a long. This is such that if we ever
add support for >4Ghz timebases on ppc32, the userland interface won't
have to change.
I have tested gettimeofday() using some glibc patches in both ppc32 and
ppc64 kernels using 32 bits userland (I haven't had a chance to test a
64 bits userland yet, but the implementation didn't change and was
tested earlier). I haven't tested yet the new functions.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The ppc32 and ppc64 versions of cacheflush.h were almost identical.
The two versions of cache.h are fairly similar, except for a bunch of
register definitions in the ppc32 version which probably belong better
elsewhere. This patch, therefore, merges both headers. Notable
points:
- there are several functions in cacheflush.h which exist only
on ppc32 or only on ppc64. These are handled by #ifdef for now, but
these should probably be consolidated, along with the actual code
behind them later.
- Confusingly, both ppc32 and ppc64 have a
flush_dcache_range(), but they're subtly different: it uses dcbf on
ppc32 and dcbst on ppc64, ppc64 has a flush_inval_dcache_range() which
uses dcbf. These too should be merged and consolidated later.
- Also flush_dcache_range() was defined in cacheflush.h on
ppc64, and in cache.h on ppc32. In the merged version it's in
cacheflush.h
- On ppc32 flush_icache_range() is a normal function from
misc.S. On ppc64, it was wrapper, testing a feature bit before
calling __flush_icache_range() which does the actual flush. This
patch takes the ppc64 approach, which amounts to no change on ppc32,
since CPU_FTR_COHERENT_ICACHE will never be set there, but does mean
renaming flush_icache_range() to __flush_icache_range() in
arch/ppc/kernel/misc.S and arch/powerpc/kernel/misc_32.S
- The PReP register info from asm-ppc/cache.h has moved to
arch/ppc/platforms/prep_setup.c
- The 8xx register info from asm-ppc/cache.h has moved to a
new asm-powerpc/reg_8xx.h, included from reg.h
- flush_dcache_all() was defined on ppc32 (only), but was
never called (although it was exported). Thus this patch removes it
from cacheflush.h and from ARCH=powerpc (misc_32.S) entirely. It's
left in ARCH=ppc for now, with the prototype moved to ppc_ksyms.c.
Built for Walnut (ARCH=ppc), 32-bit multiplatform (pmac, CHRP and PReP
ARCH=ppc, pmac and CHRP ARCH=powerpc). Built and booted on POWER5
LPAR (ARCH=powerpc and ARCH=ppc64).
Built for 32-bit powermac (ARCH=ppc and ARCH=powerpc). Built and
booted on POWER5 LPAR (ARCH=powerpc and ARCH=ppc64). Built and booted
on G5 (ARCH=powerpc)
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch merges current.h. This is a one-big-ifdef merge, but both
versions are so tiny, I think we can live with it. While we're at it,
we get rid of the fairly pointless redirection through get_current()
in the ppc64 version.
Built and booted on POWER5 LPAR (ARCH=powerpc & ARCH=ppc64). Built
for 32-bit pmac (ARCH=powerpc & ARCH=ppc).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Having already merged the ppc and ppc64 versions of signal.c, this
patch finishes the job by merging signal.h. The two versions were
almost identical already. Notable changes:
- We use BITS_PER_LONG to correctly size sigset_t
- Remove some uneeded #includes and struct forward
declarations. This does mean adding an include to signal_32.c which
relied on the indirect inclusion of sigcontext.h
- As the ppc64 version, the merged signal.h has prototypes for
do_signal() and do_signal32(). Thus remove extra prototypes from
ppc_ksyms.c which had them directly.
Built and booted on POWER5 LPAR (ARCH=ppc64 and ARCH=powerpc). Built
for 32-bit powermac (ARCH=ppc and ARCH=powerpc) and Walnut (ARCH=ppc).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
MPC834x uses the gianfar network driver which now uses the new phylib. We
need to update the platform code to create a gianfar platform MDIO bus and
pass the right intializations to the gianfar driver to make things work
again.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This is very simple with it being almost all ppc32 with just a couple
of common defines.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
xmon() prototype is inconsistent between ARCH=ppc and ARCH=powerpc,
thus causing ARCH=ppc build breakage.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Building a PowerMac kernel with ARCH=powerpc causes a bunch of warnings,
this fixes some of them
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch adds the ability to the SMU driver to recover missing
calibration partitions from the SMU chip itself. It also adds some
dynamic mecanism to /proc/device-tree so that new properties are visible
to userland.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Adds PPC32 RIO support. Init code for the MPC85xx RIO ports and glue for the
STx GP3 board to use it.
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Fix more include file problems that surfaced since I submitted the previous
fix-missing-includes.patch. This should now allow not to include sched.h
from module.h, which is done by a followup patch.
Signed-off-by: Tim Schmielau <tim@physik3.uni-rostock.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Cleanup PPC40x eval boards (bubinga, walnut and sycamore) to support U-Boot
as bootloader. The OpenBIOS bd_info struct is not used in the kernel
anymore (only U-Boot now).
uImage (U-Boot) tested on walnut, sycamore and bubinga
zImage (OpenBIOS) tested on sycamore, bubinga and ebony
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Add support for the AMCC PowerPC 440SPe SoC, including PCI Express in root
port mode.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The PowerPC 440SP SoC has two Processor Local Bus (PLB) segments (a
high-throughput segment and a low-latency segment). Fix our PLB register
definitions to cope with this, and add code to dump the status of both
segments when a machine check occurs.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The PowerPC 440SPe supports up to 16 GB of RAM, and therefore its IO registers
are at 0x4_xxxx_xxxx instead of being at 0x1_xxxx_xxxx like most other PPC 440
chips. To allow for this, this patch moves the definition of the ERPN used
for mapping UART0 from being hard-coded in the head_44x.S assembly code to
being defined in ibm44x.h.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This adds exception table entries for I/O instructions on and
changes MachineCheckException() slightly to cover 8xx specifics (on
8xx the MCE can be generated while executing the IO access instruction
itself, which is not the case on PowerMac's, as the comment on traps.c
details).
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Merge include/asm-ppc/kexec.h and include/asm-ppc64/kexec.h.
The only thing that's really changed is that we now allocate crash_notes
properly on PPC32. It's address is exported via sysfs, so it's not correct
for it to be a pointer.
I've also removed some of the "we don't use this" comments, because they're
wrong (or perhaps were referring only to arch code).
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
This patch merges the ppc32 and ppc64 versions of futex.h, essentially
by taking the ppc64 version as the powerpc version. The old ppc32
version did not implement the futex_atomic_op_inuser() callback (it
always returned -ENOSYS), so FUTEX_WAKE_OP would not work on ppc32.
In fact the ppc64 version of this function is almost suitable for
ppc32 as well - the only change needed is to extend ppc_asm.h with a
macro expanding to to the right pseudo-op to store a pointer (either
".long" or ".llong").
Built and booted on pSeries. Built for 32-bit powermac.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Here's a revised version. This re-introduces the set_bits() function
from ppc64, which I removed because I thought it was unused (it exists
on no other arch). In fact it is used in the powermac interrupt code
(but not on pSeries).
- We use LARXL/STCXL macros to generate the right (32 or 64 bit)
instructions, similar to LDL/STL from ppc_asm.h, used in fpu.S
- ppc32 previously used a full "sync" barrier at the end of
test_and_*_bit(), whereas ppc64 used an "isync". The merged version
uses "isync", since I believe that's sufficient.
- The ppc64 versions of then minix_*() bitmap functions have changed
semantics. Previously on ppc64, these functions were big-endian
(that is bit 0 was the LSB in the first 64-bit, big-endian word).
On ppc32 (and x86, for that matter, they were little-endian. As far
as I can tell, the big-endian usage was simply wrong - I guess
no-one ever tried to use minixfs on ppc64.
- On ppc32 find_next_bit() and find_next_zero_bit() are no longer
inline (they were already out-of-line on ppc64).
- For ppc64, sched_find_first_bit() has moved from mmu_context.h to
the merged bitops. What it was doing in mmu_context.h in the first
place, I have no idea.
- The fls() function is now implemented using the cntlzw instruction
on ppc64, instead of generic_fls(), as it already was on ppc32.
- For ARCH=ppc, this patch requires adding arch/powerpc/lib to the
arch/ppc/Makefile. This in turn requires some changes to
arch/powerpc/lib/Makefile which didn't correctly handle ARCH=ppc.
Built and running on G5.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch merges ppc32 and ppc64 versions of ipcbuf.h. The merge is
essentially trivial, since the structure defined in each version was
already identical. Only wrinkle is that the merged version now
includes linux/types.h in order to get the fixed width integer types.
In fact, the old versions probably should have been including that
anyway, since the file uses various __kernel_*_t types.
Built and booted on G5, built for 32-bit pmac, but not booted, since
the merge tree currently doesn't boot there.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
__MUTEX_INITIALIZER() has no users, and equates to the more commonly used
DECLARE_MUTEX(), thus making it pretty much redundant. Remove it for good.
Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Make sure we always return, as all syscalls should. Also move the common
prototype to <linux/syscalls.h>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Miklos Szeredi <miklos@szeredi.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Add sem_is_read/write_locked functions to the read/write semaphores, along the
same lines of the *_is_locked spinlock functions. The swap token tuning patch
uses sem_is_read_locked; sem_is_write_locked is added for completeness.
Signed-off-by: Rik van Riel <riel@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Convert everyone who uses platform_bus_type to include
linux/platform_device.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch fixes a numbers of issues regarding to that both 8xx and 82xx
began to use ppc_sys model:
- Platform is now identified by default deviceless SOC, if no
BOARD_CHIP_NAME is specified in the bard-specific header. For the list
of supported names refer to (arch/ppc/syslib/) mpc8xx_sys.c and
mpc82xx_sys.c for 8xx and 82xx respectively.
- Fixed a bug in identification by name - if the name was not found,
it returned -1 instead of default deviceless ppc_spec.
- fixed devices amount in the 8xx platform system descriptions
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This patch updates the 85xx platform code to support the new PHY Layer.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <Kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This implements a nvram acccess method, similar to
arch/ppc64/kernel/pSeries_nvram.c tested on CHRP B50.
Signed-off-by: Olaf Hering <olh@suse.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Change the phys_mem_access_prot() function to take a pfn instead of an
address. This allows mmap64() to work on /dev/mem for addresses above 4G
on 32-bit architectures. We start with a pfn in mmap_mem(), so there's no
need to convert to an address; in fact, it's actively bad, since the
conversion can overflow when the address is above 4G.
Similarly fix the ppc32 page_is_ram() function to avoid a conversion to an
address by directly comparing to max_pfn. Working with max_pfn instead of
high_memory fixes page_is_ram() to give the right answer for highmem pages.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Save for the header #define, ppc32 and ppc64 versions of parport.h are
identical. This patch merges them.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The recent merge of fpu.S broken the handling of fpscr for
ARCH=powerpc and CONFIG_PPC64=y. FP registers could be corrupted,
leading to strange random application crashes.
The confusion arises, because the thread_struct has (and requires) a
64-bit area to save the fpscr, because we use load/store double
instructions to get it in to/out of the FPU. However, only the low
32-bits are actually used, so we want to treat it as a 32-bit quantity
when manipulating its bits to avoid extra load/stores on 32-bit. This
patch replaces the current definition with a structure of two 32-bit
quantities (pad and val), to clarify things as much as is possible.
The 'val' field is used when manipulating bits, the structure itself
is used when obtaining the address for loading/unloading the value
from the FPU.
While we're at it, consolidate the 4 (!) almost identical versions of
cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
arch/powerpc/kernel/misc_64.S) into a single version in fpu.S. The
new version takes a pointer to thread_struct and applies the correct
offset itself, rather than a pointer to the fpscr field itself, again
to avoid confusion as to which is the correct field to use.
Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
code, which it previously did not.
Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
Booted on G5 (ARCH=powerpc) and things which previously fell over no
longer do.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Benjamin Herrenschmidt
David Gibson
Kumar Gala
Stephen Rothwell
Paul Mackerras
Matt Porter
Tim Schmielau
Roland Dreier
Marcelo Tosatti
Linus Torvalds
Michael Ellerman
Al Viro
Arthur Othieno
Christoph Hellwig
Rik Van Riel
Russell King
Vitaly Bordug
Andy Fleming
Olaf Hering
Al Viro