Updated the device trees to have the PCI nodes be at the same level as
the SOC node. This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.
Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Removed the following cruft from .dts files:
* 32-bit in cpu node -- doesn't exist in any spec and not used by kernel
* removed built-in (chrp legacy)
* Removed #interrupt-cells in places they don't need to be set
* Fixed ranges on lite5200*
* Removed clock-frequency from i8259 pic node, not sure where this came from
* Removed big-endian from i8259 pic nodes, this was just bogus
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the 83xx & 85xx device tree PCI related compartible property.
Used the following compatible properties:
PCI "fsl,mpc8349-pci"
PCI "fsl,mpc8540-pci"
PCI-X: "fsl,mpc8540-pcix"
PCIe: "fsl,mpc8548-pcie"
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The #cpus property is unused and undocumented and is therefore
being removed.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
* Fixed up top level compatible property for all boards
* Removed explicit linux,phandle usage. Use references and labels now
* Fixed interrupt sense attribute, some interrupts were marked edge, that are level
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds a defconfig and a DTS for the MPC8349E-mITX-GP, a variant of
the MPC8349E-mITX.
USB is disabled because the only USB port is not setup properly by
firmware/kernel
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala
Roy Zang
Stuart Yoder
Timur Tabi