309 lines
6.9 KiB
C
309 lines
6.9 KiB
C
/*
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* arch/arm/mach-spear3xx/spear310.c
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*
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* SPEAr310 machine source file
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*
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* Copyright (C) 2009 ST Microelectronics
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* Viresh Kumar<viresh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/ptrace.h>
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#include <asm/irq.h>
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#include <plat/shirq.h>
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#include <mach/generic.h>
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#include <mach/hardware.h>
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/* pad multiplexing support */
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/* muxing registers */
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#define PAD_MUX_CONFIG_REG 0x08
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/* devices */
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static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
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{
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.ids = 0x00,
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.mask = PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev spear310_pmx_emi_cs_0_1_4_5 = {
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.name = "emi_cs_0_1_4_5",
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.modes = pmx_emi_cs_0_1_4_5_modes,
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.mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
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{
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.ids = 0x00,
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.mask = PMX_TIMER_1_2_MASK,
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},
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};
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struct pmx_dev spear310_pmx_emi_cs_2_3 = {
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.name = "emi_cs_2_3",
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.modes = pmx_emi_cs_2_3_modes,
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.mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_uart1_modes[] = {
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{
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.ids = 0x00,
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.mask = PMX_FIRDA_MASK,
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},
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};
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struct pmx_dev spear310_pmx_uart1 = {
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.name = "uart1",
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.modes = pmx_uart1_modes,
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.mode_count = ARRAY_SIZE(pmx_uart1_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_uart2_modes[] = {
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{
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.ids = 0x00,
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.mask = PMX_TIMER_1_2_MASK,
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},
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};
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struct pmx_dev spear310_pmx_uart2 = {
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.name = "uart2",
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.modes = pmx_uart2_modes,
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.mode_count = ARRAY_SIZE(pmx_uart2_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
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{
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.ids = 0x00,
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.mask = PMX_UART0_MODEM_MASK,
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},
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};
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struct pmx_dev spear310_pmx_uart3_4_5 = {
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.name = "uart3_4_5",
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.modes = pmx_uart3_4_5_modes,
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.mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_fsmc_modes[] = {
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{
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.ids = 0x00,
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.mask = PMX_SSP_CS_MASK,
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},
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};
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struct pmx_dev spear310_pmx_fsmc = {
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.name = "fsmc",
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.modes = pmx_fsmc_modes,
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.mode_count = ARRAY_SIZE(pmx_fsmc_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
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{
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.ids = 0x00,
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.mask = PMX_MII_MASK,
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},
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};
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struct pmx_dev spear310_pmx_rs485_0_1 = {
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.name = "rs485_0_1",
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.modes = pmx_rs485_0_1_modes,
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.mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes),
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.enb_on_reset = 1,
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};
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static struct pmx_dev_mode pmx_tdm0_modes[] = {
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{
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.ids = 0x00,
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.mask = PMX_MII_MASK,
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},
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};
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struct pmx_dev spear310_pmx_tdm0 = {
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.name = "tdm0",
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.modes = pmx_tdm0_modes,
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.mode_count = ARRAY_SIZE(pmx_tdm0_modes),
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.enb_on_reset = 1,
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};
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/* pmx driver structure */
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static struct pmx_driver pmx_driver = {
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.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
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};
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/* spear3xx shared irq */
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static struct shirq_dev_config shirq_ras1_config[] = {
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{
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.virq = SPEAR310_VIRQ_SMII0,
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.status_mask = SPEAR310_SMII0_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_SMII1,
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.status_mask = SPEAR310_SMII1_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_SMII2,
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.status_mask = SPEAR310_SMII2_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_SMII3,
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.status_mask = SPEAR310_SMII3_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_WAKEUP_SMII0,
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.status_mask = SPEAR310_WAKEUP_SMII0_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_WAKEUP_SMII1,
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.status_mask = SPEAR310_WAKEUP_SMII1_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_WAKEUP_SMII2,
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.status_mask = SPEAR310_WAKEUP_SMII2_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_WAKEUP_SMII3,
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.status_mask = SPEAR310_WAKEUP_SMII3_IRQ_MASK,
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},
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};
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static struct spear_shirq shirq_ras1 = {
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.irq = SPEAR3XX_IRQ_GEN_RAS_1,
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.dev_config = shirq_ras1_config,
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.dev_count = ARRAY_SIZE(shirq_ras1_config),
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.regs = {
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.enb_reg = -1,
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.status_reg = SPEAR310_INT_STS_MASK_REG,
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.status_reg_mask = SPEAR310_SHIRQ_RAS1_MASK,
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.clear_reg = -1,
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},
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};
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static struct shirq_dev_config shirq_ras2_config[] = {
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{
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.virq = SPEAR310_VIRQ_UART1,
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.status_mask = SPEAR310_UART1_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_UART2,
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.status_mask = SPEAR310_UART2_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_UART3,
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.status_mask = SPEAR310_UART3_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_UART4,
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.status_mask = SPEAR310_UART4_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_UART5,
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.status_mask = SPEAR310_UART5_IRQ_MASK,
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},
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};
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static struct spear_shirq shirq_ras2 = {
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.irq = SPEAR3XX_IRQ_GEN_RAS_2,
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.dev_config = shirq_ras2_config,
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.dev_count = ARRAY_SIZE(shirq_ras2_config),
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.regs = {
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.enb_reg = -1,
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.status_reg = SPEAR310_INT_STS_MASK_REG,
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.status_reg_mask = SPEAR310_SHIRQ_RAS2_MASK,
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.clear_reg = -1,
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},
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};
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static struct shirq_dev_config shirq_ras3_config[] = {
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{
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.virq = SPEAR310_VIRQ_EMI,
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.status_mask = SPEAR310_EMI_IRQ_MASK,
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},
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};
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static struct spear_shirq shirq_ras3 = {
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.irq = SPEAR3XX_IRQ_GEN_RAS_3,
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.dev_config = shirq_ras3_config,
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.dev_count = ARRAY_SIZE(shirq_ras3_config),
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.regs = {
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.enb_reg = -1,
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.status_reg = SPEAR310_INT_STS_MASK_REG,
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.status_reg_mask = SPEAR310_SHIRQ_RAS3_MASK,
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.clear_reg = -1,
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},
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};
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static struct shirq_dev_config shirq_intrcomm_ras_config[] = {
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{
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.virq = SPEAR310_VIRQ_TDM_HDLC,
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.status_mask = SPEAR310_TDM_HDLC_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_RS485_0,
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.status_mask = SPEAR310_RS485_0_IRQ_MASK,
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}, {
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.virq = SPEAR310_VIRQ_RS485_1,
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.status_mask = SPEAR310_RS485_1_IRQ_MASK,
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},
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};
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static struct spear_shirq shirq_intrcomm_ras = {
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.irq = SPEAR3XX_IRQ_INTRCOMM_RAS_ARM,
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.dev_config = shirq_intrcomm_ras_config,
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.dev_count = ARRAY_SIZE(shirq_intrcomm_ras_config),
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.regs = {
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.enb_reg = -1,
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.status_reg = SPEAR310_INT_STS_MASK_REG,
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.status_reg_mask = SPEAR310_SHIRQ_INTRCOMM_RAS_MASK,
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.clear_reg = -1,
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},
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};
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/* Add spear310 specific devices here */
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/* spear310 routines */
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void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs,
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u8 pmx_dev_count)
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{
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void __iomem *base;
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int ret = 0;
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/* call spear3xx family common init function */
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spear3xx_init();
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/* shared irq registration */
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base = ioremap(SPEAR310_SOC_CONFIG_BASE, SZ_4K);
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if (base) {
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/* shirq 1 */
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shirq_ras1.regs.base = base;
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ret = spear_shirq_register(&shirq_ras1);
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if (ret)
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printk(KERN_ERR "Error registering Shared IRQ 1\n");
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/* shirq 2 */
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shirq_ras2.regs.base = base;
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ret = spear_shirq_register(&shirq_ras2);
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if (ret)
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printk(KERN_ERR "Error registering Shared IRQ 2\n");
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/* shirq 3 */
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shirq_ras3.regs.base = base;
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ret = spear_shirq_register(&shirq_ras3);
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if (ret)
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printk(KERN_ERR "Error registering Shared IRQ 3\n");
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/* shirq 4 */
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shirq_intrcomm_ras.regs.base = base;
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ret = spear_shirq_register(&shirq_intrcomm_ras);
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if (ret)
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printk(KERN_ERR "Error registering Shared IRQ 4\n");
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}
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/* pmx initialization */
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pmx_driver.base = base;
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pmx_driver.mode = pmx_mode;
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pmx_driver.devs = pmx_devs;
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pmx_driver.devs_count = pmx_dev_count;
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ret = pmx_register(&pmx_driver);
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if (ret)
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printk(KERN_ERR "padmux: registeration failed. err no: %d\n",
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ret);
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}
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