40 lines
968 B
C
40 lines
968 B
C
/* mach/dma.h - arch-specific DMA defines
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*
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* Copyright 2004-2008 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef _MACH_DMA_H_
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#define _MACH_DMA_H_
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#define MAX_DMA_CHANNELS 36
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/* [#4267] IMDMA channels have no PERIPHERAL_MAP MMR */
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#define MAX_DMA_SUSPEND_CHANNELS 32
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#define CH_PPI0 0
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#define CH_PPI (CH_PPI0)
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#define CH_PPI1 1
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#define CH_SPORT0_RX 12
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#define CH_SPORT0_TX 13
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#define CH_SPORT1_RX 14
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#define CH_SPORT1_TX 15
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#define CH_SPI 16
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#define CH_UART_RX 17
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#define CH_UART_TX 18
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#define CH_MEM_STREAM0_DEST 24 /* TX */
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#define CH_MEM_STREAM0_SRC 25 /* RX */
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#define CH_MEM_STREAM1_DEST 26 /* TX */
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#define CH_MEM_STREAM1_SRC 27 /* RX */
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#define CH_MEM_STREAM2_DEST 28
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#define CH_MEM_STREAM2_SRC 29
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#define CH_MEM_STREAM3_DEST 30
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#define CH_MEM_STREAM3_SRC 31
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#define CH_IMEM_STREAM0_DEST 32
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#define CH_IMEM_STREAM0_SRC 33
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#define CH_IMEM_STREAM1_DEST 34
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#define CH_IMEM_STREAM1_SRC 35
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#endif
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