650 lines
15 KiB
C
650 lines
15 KiB
C
/*
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* KFR2R09 board support code
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*
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* Copyright (C) 2009 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sh_mobile_sdhi.h>
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#include <linux/mfd/tmio.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/onenand.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <linux/input.h>
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#include <linux/input/sh_keysc.h>
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#include <linux/i2c.h>
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#include <linux/usb/r8a66597.h>
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#include <media/rj54n1cb0c.h>
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#include <media/soc_camera.h>
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#include <media/sh_mobile_ceu.h>
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#include <video/sh_mobile_lcdc.h>
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#include <asm/suspend.h>
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#include <asm/clock.h>
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#include <asm/machvec.h>
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#include <asm/io.h>
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#include <cpu/sh7724.h>
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#include <mach/kfr2r09.h>
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static struct mtd_partition kfr2r09_nor_flash_partitions[] =
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{
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{
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.name = "boot",
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.offset = 0,
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.size = (4 * 1024 * 1024),
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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},
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{
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.name = "other",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data kfr2r09_nor_flash_data = {
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.width = 2,
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.parts = kfr2r09_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(kfr2r09_nor_flash_partitions),
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};
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static struct resource kfr2r09_nor_flash_resources[] = {
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[0] = {
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.name = "NOR Flash",
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.start = 0x00000000,
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.end = 0x03ffffff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device kfr2r09_nor_flash_device = {
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.name = "physmap-flash",
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.resource = kfr2r09_nor_flash_resources,
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.num_resources = ARRAY_SIZE(kfr2r09_nor_flash_resources),
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.dev = {
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.platform_data = &kfr2r09_nor_flash_data,
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},
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};
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static struct resource kfr2r09_nand_flash_resources[] = {
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[0] = {
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.name = "NAND Flash",
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.start = 0x10000000,
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.end = 0x1001ffff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device kfr2r09_nand_flash_device = {
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.name = "onenand-flash",
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.resource = kfr2r09_nand_flash_resources,
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.num_resources = ARRAY_SIZE(kfr2r09_nand_flash_resources),
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};
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static struct sh_keysc_info kfr2r09_sh_keysc_info = {
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.mode = SH_KEYSC_MODE_1, /* KEYOUT0->4, KEYIN0->4 */
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.scan_timing = 3,
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.delay = 10,
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.keycodes = {
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KEY_PHONE, KEY_CLEAR, KEY_MAIL, KEY_WWW, KEY_ENTER,
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KEY_1, KEY_2, KEY_3, 0, KEY_UP,
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KEY_4, KEY_5, KEY_6, 0, KEY_LEFT,
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KEY_7, KEY_8, KEY_9, KEY_PROG1, KEY_RIGHT,
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KEY_S, KEY_0, KEY_P, KEY_PROG2, KEY_DOWN,
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0, 0, 0, 0, 0
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},
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};
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static struct resource kfr2r09_sh_keysc_resources[] = {
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[0] = {
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.name = "KEYSC",
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.start = 0x044b0000,
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.end = 0x044b000f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 79,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kfr2r09_sh_keysc_device = {
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.name = "sh_keysc",
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.id = 0, /* "keysc0" clock */
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.num_resources = ARRAY_SIZE(kfr2r09_sh_keysc_resources),
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.resource = kfr2r09_sh_keysc_resources,
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.dev = {
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.platform_data = &kfr2r09_sh_keysc_info,
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},
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.archdata = {
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.hwblk_id = HWBLK_KEYSC,
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},
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};
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static const struct fb_videomode kfr2r09_lcdc_modes[] = {
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{
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.name = "TX07D34VM0AAA",
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.xres = 240,
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.yres = 400,
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.left_margin = 0,
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.right_margin = 16,
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.hsync_len = 8,
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.upper_margin = 0,
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.lower_margin = 1,
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.vsync_len = 1,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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},
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};
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static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
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.clock_source = LCDC_CLK_BUS,
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.ch[0] = {
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.chan = LCDC_CHAN_MAINLCD,
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.bpp = 16,
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.interface_type = SYS18,
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.clock_divider = 6,
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.flags = LCDC_FLAGS_DWPOL,
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.lcd_cfg = kfr2r09_lcdc_modes,
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.num_cfg = ARRAY_SIZE(kfr2r09_lcdc_modes),
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.lcd_size_cfg = {
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.width = 35,
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.height = 58,
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},
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.board_cfg = {
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.setup_sys = kfr2r09_lcd_setup,
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.start_transfer = kfr2r09_lcd_start,
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.display_on = kfr2r09_lcd_on,
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.display_off = kfr2r09_lcd_off,
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},
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.sys_bus_cfg = {
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.ldmt2r = 0x07010904,
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.ldmt3r = 0x14012914,
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/* set 1s delay to encourage fsync() */
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.deferred_io_msec = 1000,
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},
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}
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};
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static struct resource kfr2r09_sh_lcdc_resources[] = {
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[0] = {
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.name = "LCDC",
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.start = 0xfe940000, /* P4-only space */
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.end = 0xfe942fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 106,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kfr2r09_sh_lcdc_device = {
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.name = "sh_mobile_lcdc_fb",
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.num_resources = ARRAY_SIZE(kfr2r09_sh_lcdc_resources),
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.resource = kfr2r09_sh_lcdc_resources,
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.dev = {
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.platform_data = &kfr2r09_sh_lcdc_info,
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},
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.archdata = {
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.hwblk_id = HWBLK_LCDC,
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},
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};
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static struct r8a66597_platdata kfr2r09_usb0_gadget_data = {
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.on_chip = 1,
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};
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static struct resource kfr2r09_usb0_gadget_resources[] = {
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[0] = {
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.start = 0x04d80000,
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.end = 0x04d80123,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 65,
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.end = 65,
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.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
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},
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};
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static struct platform_device kfr2r09_usb0_gadget_device = {
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.name = "r8a66597_udc",
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.id = 0,
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.dev = {
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.dma_mask = NULL, /* not use dma */
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &kfr2r09_usb0_gadget_data,
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},
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.num_resources = ARRAY_SIZE(kfr2r09_usb0_gadget_resources),
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.resource = kfr2r09_usb0_gadget_resources,
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};
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static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
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.flags = SH_CEU_FLAG_USE_8BIT_BUS,
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};
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static struct resource kfr2r09_ceu_resources[] = {
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[0] = {
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.name = "CEU",
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.start = 0xfe910000,
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.end = 0xfe91009f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 52,
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.end = 52,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* place holder for contiguous memory */
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},
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};
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static struct platform_device kfr2r09_ceu_device = {
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.name = "sh_mobile_ceu",
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.id = 0, /* "ceu0" clock */
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.num_resources = ARRAY_SIZE(kfr2r09_ceu_resources),
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.resource = kfr2r09_ceu_resources,
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.dev = {
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.platform_data = &sh_mobile_ceu_info,
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},
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.archdata = {
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.hwblk_id = HWBLK_CEU0,
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},
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};
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static struct i2c_board_info kfr2r09_i2c_camera = {
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I2C_BOARD_INFO("rj54n1cb0c", 0x50),
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};
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static struct clk *camera_clk;
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/* set VIO_CKO clock to 25MHz */
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#define CEU_MCLK_FREQ 25000000
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#define DRVCRB 0xA405018C
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static int camera_power(struct device *dev, int mode)
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{
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int ret;
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if (mode) {
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long rate;
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camera_clk = clk_get(NULL, "video_clk");
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if (IS_ERR(camera_clk))
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return PTR_ERR(camera_clk);
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rate = clk_round_rate(camera_clk, CEU_MCLK_FREQ);
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ret = clk_set_rate(camera_clk, rate);
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if (ret < 0)
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goto eclkrate;
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/* set DRVCRB
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*
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* use 1.8 V for VccQ_VIO
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* use 2.85V for VccQ_SR
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*/
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__raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
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/* reset clear */
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ret = gpio_request(GPIO_PTB4, NULL);
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if (ret < 0)
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goto eptb4;
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ret = gpio_request(GPIO_PTB7, NULL);
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if (ret < 0)
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goto eptb7;
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ret = gpio_direction_output(GPIO_PTB4, 1);
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if (!ret)
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ret = gpio_direction_output(GPIO_PTB7, 1);
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if (ret < 0)
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goto egpioout;
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msleep(1);
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ret = clk_enable(camera_clk); /* start VIO_CKO */
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if (ret < 0)
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goto eclkon;
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return 0;
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}
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ret = 0;
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clk_disable(camera_clk);
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eclkon:
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gpio_set_value(GPIO_PTB7, 0);
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egpioout:
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gpio_set_value(GPIO_PTB4, 0);
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gpio_free(GPIO_PTB7);
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eptb7:
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gpio_free(GPIO_PTB4);
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eptb4:
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eclkrate:
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clk_put(camera_clk);
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return ret;
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}
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static struct rj54n1_pdata rj54n1_priv = {
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.mclk_freq = CEU_MCLK_FREQ,
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.ioctl_high = false,
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};
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static struct soc_camera_link rj54n1_link = {
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.power = camera_power,
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.board_info = &kfr2r09_i2c_camera,
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.i2c_adapter_id = 1,
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.priv = &rj54n1_priv,
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};
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static struct platform_device kfr2r09_camera = {
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.name = "soc-camera-pdrv",
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.id = 0,
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.dev = {
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.platform_data = &rj54n1_link,
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},
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};
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static struct resource kfr2r09_sh_sdhi0_resources[] = {
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[0] = {
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.name = "SDHI0",
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.start = 0x04ce0000,
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.end = 0x04ce00ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = 100,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
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.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
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.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
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.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
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.tmio_caps = MMC_CAP_SDIO_IRQ,
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};
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static struct platform_device kfr2r09_sh_sdhi0_device = {
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.name = "sh_mobile_sdhi",
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.num_resources = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources),
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.resource = kfr2r09_sh_sdhi0_resources,
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.dev = {
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.platform_data = &sh7724_sdhi0_data,
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},
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.archdata = {
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.hwblk_id = HWBLK_SDHI0,
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},
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};
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static struct platform_device *kfr2r09_devices[] __initdata = {
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&kfr2r09_nor_flash_device,
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&kfr2r09_nand_flash_device,
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&kfr2r09_sh_keysc_device,
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&kfr2r09_sh_lcdc_device,
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&kfr2r09_ceu_device,
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&kfr2r09_camera,
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&kfr2r09_sh_sdhi0_device,
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};
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#define BSC_CS0BCR 0xfec10004
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#define BSC_CS0WCR 0xfec10024
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#define BSC_CS4BCR 0xfec10010
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#define BSC_CS4WCR 0xfec10030
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#define PORT_MSELCRB 0xa4050182
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#ifdef CONFIG_I2C
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static int kfr2r09_usb0_gadget_i2c_setup(void)
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{
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struct i2c_adapter *a;
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struct i2c_msg msg;
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unsigned char buf[2];
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int ret;
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a = i2c_get_adapter(0);
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if (!a)
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return -ENODEV;
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/* set bit 1 (the second bit) of chip at 0x09, register 0x13 */
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buf[0] = 0x13;
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msg.addr = 0x09;
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msg.buf = buf;
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msg.len = 1;
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msg.flags = 0;
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ret = i2c_transfer(a, &msg, 1);
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if (ret != 1)
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return -ENODEV;
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buf[0] = 0;
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msg.addr = 0x09;
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msg.buf = buf;
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msg.len = 1;
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msg.flags = I2C_M_RD;
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ret = i2c_transfer(a, &msg, 1);
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if (ret != 1)
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return -ENODEV;
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buf[1] = buf[0] | (1 << 1);
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buf[0] = 0x13;
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msg.addr = 0x09;
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msg.buf = buf;
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msg.len = 2;
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msg.flags = 0;
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ret = i2c_transfer(a, &msg, 1);
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if (ret != 1)
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return -ENODEV;
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return 0;
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}
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static int kfr2r09_serial_i2c_setup(void)
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{
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struct i2c_adapter *a;
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struct i2c_msg msg;
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unsigned char buf[2];
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int ret;
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a = i2c_get_adapter(0);
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if (!a)
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return -ENODEV;
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/* set bit 6 (the 7th bit) of chip at 0x09, register 0x13 */
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buf[0] = 0x13;
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msg.addr = 0x09;
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msg.buf = buf;
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msg.len = 1;
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msg.flags = 0;
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ret = i2c_transfer(a, &msg, 1);
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if (ret != 1)
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return -ENODEV;
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buf[0] = 0;
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msg.addr = 0x09;
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msg.buf = buf;
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msg.len = 1;
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msg.flags = I2C_M_RD;
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ret = i2c_transfer(a, &msg, 1);
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if (ret != 1)
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return -ENODEV;
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buf[1] = buf[0] | (1 << 6);
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buf[0] = 0x13;
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msg.addr = 0x09;
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msg.buf = buf;
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msg.len = 2;
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msg.flags = 0;
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ret = i2c_transfer(a, &msg, 1);
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if (ret != 1)
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return -ENODEV;
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return 0;
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}
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#else
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static int kfr2r09_usb0_gadget_i2c_setup(void)
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{
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return -ENODEV;
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}
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static int kfr2r09_serial_i2c_setup(void)
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{
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return -ENODEV;
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}
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#endif
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static int kfr2r09_usb0_gadget_setup(void)
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{
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int plugged_in;
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gpio_request(GPIO_PTN4, NULL); /* USB_DET */
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gpio_direction_input(GPIO_PTN4);
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plugged_in = gpio_get_value(GPIO_PTN4);
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if (!plugged_in)
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return -ENODEV; /* no cable plugged in */
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if (kfr2r09_usb0_gadget_i2c_setup() != 0)
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return -ENODEV; /* unable to configure using i2c */
|
|
|
|
__raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
|
|
gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
|
|
gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
|
|
gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
|
|
msleep(20); /* wait 20ms to let the clock settle */
|
|
clk_enable(clk_get(NULL, "usb0"));
|
|
__raw_writew(0x0600, 0xa40501d4);
|
|
|
|
return 0;
|
|
}
|
|
|
|
extern char kfr2r09_sdram_enter_start;
|
|
extern char kfr2r09_sdram_enter_end;
|
|
extern char kfr2r09_sdram_leave_start;
|
|
extern char kfr2r09_sdram_leave_end;
|
|
|
|
static int __init kfr2r09_devices_setup(void)
|
|
{
|
|
/* register board specific self-refresh code */
|
|
sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
|
|
SUSP_SH_RSTANDBY,
|
|
&kfr2r09_sdram_enter_start,
|
|
&kfr2r09_sdram_enter_end,
|
|
&kfr2r09_sdram_leave_start,
|
|
&kfr2r09_sdram_leave_end);
|
|
|
|
/* enable SCIF1 serial port for YC401 console support */
|
|
gpio_request(GPIO_FN_SCIF1_RXD, NULL);
|
|
gpio_request(GPIO_FN_SCIF1_TXD, NULL);
|
|
kfr2r09_serial_i2c_setup(); /* ECONTMSK(bit6=L10ONEN) set 1 */
|
|
gpio_request(GPIO_PTG3, NULL); /* HPON_ON */
|
|
gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
|
|
|
|
/* setup NOR flash at CS0 */
|
|
__raw_writel(0x36db0400, BSC_CS0BCR);
|
|
__raw_writel(0x00000500, BSC_CS0WCR);
|
|
|
|
/* setup NAND flash at CS4 */
|
|
__raw_writel(0x36db0400, BSC_CS4BCR);
|
|
__raw_writel(0x00000500, BSC_CS4WCR);
|
|
|
|
/* setup KEYSC pins */
|
|
gpio_request(GPIO_FN_KEYOUT0, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT1, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT2, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT3, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
|
|
gpio_request(GPIO_FN_KEYIN0, NULL);
|
|
gpio_request(GPIO_FN_KEYIN1, NULL);
|
|
gpio_request(GPIO_FN_KEYIN2, NULL);
|
|
gpio_request(GPIO_FN_KEYIN3, NULL);
|
|
gpio_request(GPIO_FN_KEYIN4, NULL);
|
|
gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
|
|
|
|
/* setup LCDC pins for SYS panel */
|
|
gpio_request(GPIO_FN_LCDD17, NULL);
|
|
gpio_request(GPIO_FN_LCDD16, NULL);
|
|
gpio_request(GPIO_FN_LCDD15, NULL);
|
|
gpio_request(GPIO_FN_LCDD14, NULL);
|
|
gpio_request(GPIO_FN_LCDD13, NULL);
|
|
gpio_request(GPIO_FN_LCDD12, NULL);
|
|
gpio_request(GPIO_FN_LCDD11, NULL);
|
|
gpio_request(GPIO_FN_LCDD10, NULL);
|
|
gpio_request(GPIO_FN_LCDD9, NULL);
|
|
gpio_request(GPIO_FN_LCDD8, NULL);
|
|
gpio_request(GPIO_FN_LCDD7, NULL);
|
|
gpio_request(GPIO_FN_LCDD6, NULL);
|
|
gpio_request(GPIO_FN_LCDD5, NULL);
|
|
gpio_request(GPIO_FN_LCDD4, NULL);
|
|
gpio_request(GPIO_FN_LCDD3, NULL);
|
|
gpio_request(GPIO_FN_LCDD2, NULL);
|
|
gpio_request(GPIO_FN_LCDD1, NULL);
|
|
gpio_request(GPIO_FN_LCDD0, NULL);
|
|
gpio_request(GPIO_FN_LCDRS, NULL); /* LCD_RS */
|
|
gpio_request(GPIO_FN_LCDCS, NULL); /* LCD_CS/ */
|
|
gpio_request(GPIO_FN_LCDRD, NULL); /* LCD_RD/ */
|
|
gpio_request(GPIO_FN_LCDWR, NULL); /* LCD_WR/ */
|
|
gpio_request(GPIO_FN_LCDVSYN, NULL); /* LCD_VSYNC */
|
|
gpio_request(GPIO_PTE4, NULL); /* LCD_RST/ */
|
|
gpio_direction_output(GPIO_PTE4, 1);
|
|
gpio_request(GPIO_PTF4, NULL); /* PROTECT/ */
|
|
gpio_direction_output(GPIO_PTF4, 1);
|
|
gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */
|
|
gpio_direction_output(GPIO_PTU0, 1);
|
|
|
|
/* setup USB function */
|
|
if (kfr2r09_usb0_gadget_setup() == 0)
|
|
platform_device_register(&kfr2r09_usb0_gadget_device);
|
|
|
|
/* CEU */
|
|
gpio_request(GPIO_FN_VIO_CKO, NULL);
|
|
gpio_request(GPIO_FN_VIO0_CLK, NULL);
|
|
gpio_request(GPIO_FN_VIO0_VD, NULL);
|
|
gpio_request(GPIO_FN_VIO0_HD, NULL);
|
|
gpio_request(GPIO_FN_VIO0_FLD, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D7, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D6, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D5, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D4, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D3, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D2, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D1, NULL);
|
|
gpio_request(GPIO_FN_VIO0_D0, NULL);
|
|
|
|
platform_resource_setup_memory(&kfr2r09_ceu_device, "ceu", 4 << 20);
|
|
|
|
/* SDHI0 connected to yc304 */
|
|
gpio_request(GPIO_FN_SDHI0CD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0D3, NULL);
|
|
gpio_request(GPIO_FN_SDHI0D2, NULL);
|
|
gpio_request(GPIO_FN_SDHI0D1, NULL);
|
|
gpio_request(GPIO_FN_SDHI0D0, NULL);
|
|
gpio_request(GPIO_FN_SDHI0CMD, NULL);
|
|
gpio_request(GPIO_FN_SDHI0CLK, NULL);
|
|
|
|
return platform_add_devices(kfr2r09_devices,
|
|
ARRAY_SIZE(kfr2r09_devices));
|
|
}
|
|
device_initcall(kfr2r09_devices_setup);
|
|
|
|
/* Return the board specific boot mode pin configuration */
|
|
static int kfr2r09_mode_pins(void)
|
|
{
|
|
/* MD0=1, MD1=1, MD2=0: Clock Mode 3
|
|
* MD3=0: 16-bit Area0 Bus Width
|
|
* MD5=1: Little Endian
|
|
* MD8=1: Test Mode Disabled
|
|
*/
|
|
return MODE_PIN0 | MODE_PIN1 | MODE_PIN5 | MODE_PIN8;
|
|
}
|
|
|
|
/*
|
|
* The Machine Vector
|
|
*/
|
|
static struct sh_machine_vector mv_kfr2r09 __initmv = {
|
|
.mv_name = "kfr2r09",
|
|
.mv_mode_pins = kfr2r09_mode_pins,
|
|
};
|