linux-stable-rt/drivers/staging/tidspbridge
Vladimir Zapolskiy fcde2bf0b9 staging: tidspbridge: MMU2 registers are limited to 32-bit data access
According to OMAP3 TRM access to MMU registers shall be strictly 32-bit
aligned.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-19 13:42:49 -07:00
..
Documentation
core
dynload
gen
hw
include/dspbridge
pmgr
rmgr
Kconfig
Makefile
TODO