247 lines
6.9 KiB
C
247 lines
6.9 KiB
C
/*
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* opl3_hw.h - Definitions of the OPL-3 registers
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*
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*
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* Copyright (C) by Hannu Savolainen 1993-1997
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*
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* OSS/Free for Linux is distributed under the GNU GENERAL PUBLIC LICENSE (GPL)
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* Version 2 (June 1991). See the "COPYING" file distributed with this software
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* for more info.
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*
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*
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* The OPL-3 mode is switched on by writing 0x01, to the offset 5
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* of the right side.
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*
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* Another special register at the right side is at offset 4. It contains
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* a bit mask defining which voices are used as 4 OP voices.
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*
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* The percussive mode is implemented in the left side only.
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*
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* With the above exceptions the both sides can be operated independently.
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*
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* A 4 OP voice can be created by setting the corresponding
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* bit at offset 4 of the right side.
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*
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* For example setting the rightmost bit (0x01) changes the
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* first voice on the right side to the 4 OP mode. The fourth
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* voice is made inaccessible.
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*
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* If a voice is set to the 2 OP mode, it works like 2 OP modes
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* of the original YM3812 (AdLib). In addition the voice can
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* be connected the left, right or both stereo channels. It can
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* even be left unconnected. This works with 4 OP voices also.
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*
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* The stereo connection bits are located in the FEEDBACK_CONNECTION
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* register of the voice (0xC0-0xC8). In 4 OP voices these bits are
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* in the second half of the voice.
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*/
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/*
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* Register numbers for the global registers
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*/
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#define TEST_REGISTER 0x01
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#define ENABLE_WAVE_SELECT 0x20
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#define TIMER1_REGISTER 0x02
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#define TIMER2_REGISTER 0x03
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#define TIMER_CONTROL_REGISTER 0x04 /* Left side */
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#define IRQ_RESET 0x80
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#define TIMER1_MASK 0x40
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#define TIMER2_MASK 0x20
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#define TIMER1_START 0x01
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#define TIMER2_START 0x02
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#define CONNECTION_SELECT_REGISTER 0x04 /* Right side */
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#define RIGHT_4OP_0 0x01
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#define RIGHT_4OP_1 0x02
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#define RIGHT_4OP_2 0x04
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#define LEFT_4OP_0 0x08
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#define LEFT_4OP_1 0x10
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#define LEFT_4OP_2 0x20
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#define OPL3_MODE_REGISTER 0x05 /* Right side */
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#define OPL3_ENABLE 0x01
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#define OPL4_ENABLE 0x02
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#define KBD_SPLIT_REGISTER 0x08 /* Left side */
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#define COMPOSITE_SINE_WAVE_MODE 0x80 /* Don't use with OPL-3? */
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#define KEYBOARD_SPLIT 0x40
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#define PERCOSSION_REGISTER 0xbd /* Left side only */
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#define TREMOLO_DEPTH 0x80
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#define VIBRATO_DEPTH 0x40
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#define PERCOSSION_ENABLE 0x20
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#define BASSDRUM_ON 0x10
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#define SNAREDRUM_ON 0x08
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#define TOMTOM_ON 0x04
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#define CYMBAL_ON 0x02
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#define HIHAT_ON 0x01
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/*
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* Offsets to the register banks for operators. To get the
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* register number just add the operator offset to the bank offset
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*
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* AM/VIB/EG/KSR/Multiple (0x20 to 0x35)
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*/
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#define AM_VIB 0x20
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#define TREMOLO_ON 0x80
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#define VIBRATO_ON 0x40
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#define SUSTAIN_ON 0x20
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#define KSR 0x10 /* Key scaling rate */
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#define MULTIPLE_MASK 0x0f /* Frequency multiplier */
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/*
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* KSL/Total level (0x40 to 0x55)
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*/
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#define KSL_LEVEL 0x40
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#define KSL_MASK 0xc0 /* Envelope scaling bits */
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#define TOTAL_LEVEL_MASK 0x3f /* Strength (volume) of OP */
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/*
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* Attack / Decay rate (0x60 to 0x75)
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*/
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#define ATTACK_DECAY 0x60
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#define ATTACK_MASK 0xf0
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#define DECAY_MASK 0x0f
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/*
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* Sustain level / Release rate (0x80 to 0x95)
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*/
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#define SUSTAIN_RELEASE 0x80
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#define SUSTAIN_MASK 0xf0
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#define RELEASE_MASK 0x0f
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/*
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* Wave select (0xE0 to 0xF5)
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*/
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#define WAVE_SELECT 0xe0
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/*
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* Offsets to the register banks for voices. Just add to the
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* voice number to get the register number.
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*
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* F-Number low bits (0xA0 to 0xA8).
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*/
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#define FNUM_LOW 0xa0
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/*
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* F-number high bits / Key on / Block (octave) (0xB0 to 0xB8)
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*/
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#define KEYON_BLOCK 0xb0
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#define KEYON_BIT 0x20
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#define BLOCKNUM_MASK 0x1c
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#define FNUM_HIGH_MASK 0x03
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/*
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* Feedback / Connection (0xc0 to 0xc8)
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*
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* These registers have two new bits when the OPL-3 mode
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* is selected. These bits controls connecting the voice
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* to the stereo channels. For 4 OP voices this bit is
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* defined in the second half of the voice (add 3 to the
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* register offset).
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*
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* For 4 OP voices the connection bit is used in the
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* both halves (gives 4 ways to connect the operators).
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*/
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#define FEEDBACK_CONNECTION 0xc0
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#define FEEDBACK_MASK 0x0e /* Valid just for 1st OP of a voice */
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#define CONNECTION_BIT 0x01
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/*
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* In the 4 OP mode there is four possible configurations how the
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* operators can be connected together (in 2 OP modes there is just
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* AM or FM). The 4 OP connection mode is defined by the rightmost
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* bit of the FEEDBACK_CONNECTION (0xC0-0xC8) on the both halves.
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*
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* First half Second half Mode
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*
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* +---+
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* v |
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* 0 0 >+-1-+--2--3--4-->
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*
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*
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*
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* +---+
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* | |
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* 0 1 >+-1-+--2-+
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* |->
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* >--3----4-+
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*
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* +---+
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* | |
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* 1 0 >+-1-+-----+
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* |->
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* >--2--3--4-+
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*
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* +---+
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* | |
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* 1 1 >+-1-+--+
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* |
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* >--2--3-+->
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* |
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* >--4----+
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*/
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#define STEREO_BITS 0x30 /* OPL-3 only */
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#define VOICE_TO_LEFT 0x10
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#define VOICE_TO_RIGHT 0x20
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/*
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* Definition table for the physical voices
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*/
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struct physical_voice_info {
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unsigned char voice_num;
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unsigned char voice_mode; /* 0=unavailable, 2=2 OP, 4=4 OP */
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unsigned short ioaddr; /* I/O port (left or right side) */
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unsigned char op[4]; /* Operator offsets */
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};
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/*
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* There is 18 possible 2 OP voices
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* (9 in the left and 9 in the right).
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* The first OP is the modulator and 2nd is the carrier.
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*
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* The first three voices in the both sides may be connected
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* with another voice to a 4 OP voice. For example voice 0
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* can be connected with voice 3. The operators of voice 3 are
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* used as operators 3 and 4 of the new 4 OP voice.
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* In this case the 2 OP voice number 0 is the 'first half' and
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* voice 3 is the second.
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*/
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#define USE_LEFT 0
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#define USE_RIGHT 1
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static struct physical_voice_info pv_map[18] =
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{
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/* No Mode Side OP1 OP2 OP3 OP4 */
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/* --------------------------------------------------- */
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{ 0, 2, USE_LEFT, {0x00, 0x03, 0x08, 0x0b}},
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{ 1, 2, USE_LEFT, {0x01, 0x04, 0x09, 0x0c}},
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{ 2, 2, USE_LEFT, {0x02, 0x05, 0x0a, 0x0d}},
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{ 3, 2, USE_LEFT, {0x08, 0x0b, 0x00, 0x00}},
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{ 4, 2, USE_LEFT, {0x09, 0x0c, 0x00, 0x00}},
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{ 5, 2, USE_LEFT, {0x0a, 0x0d, 0x00, 0x00}},
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{ 6, 2, USE_LEFT, {0x10, 0x13, 0x00, 0x00}}, /* Used by percussive voices */
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{ 7, 2, USE_LEFT, {0x11, 0x14, 0x00, 0x00}}, /* if the percussive mode */
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{ 8, 2, USE_LEFT, {0x12, 0x15, 0x00, 0x00}}, /* is selected */
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{ 0, 2, USE_RIGHT, {0x00, 0x03, 0x08, 0x0b}},
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{ 1, 2, USE_RIGHT, {0x01, 0x04, 0x09, 0x0c}},
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{ 2, 2, USE_RIGHT, {0x02, 0x05, 0x0a, 0x0d}},
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{ 3, 2, USE_RIGHT, {0x08, 0x0b, 0x00, 0x00}},
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{ 4, 2, USE_RIGHT, {0x09, 0x0c, 0x00, 0x00}},
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{ 5, 2, USE_RIGHT, {0x0a, 0x0d, 0x00, 0x00}},
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{ 6, 2, USE_RIGHT, {0x10, 0x13, 0x00, 0x00}},
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{ 7, 2, USE_RIGHT, {0x11, 0x14, 0x00, 0x00}},
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{ 8, 2, USE_RIGHT, {0x12, 0x15, 0x00, 0x00}}
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};
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/*
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* DMA buffer calls
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*/
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