88 lines
2.4 KiB
C
88 lines
2.4 KiB
C
/*
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* File: include/asm-blackfin/cplbinit.h
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* Based on:
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* Author:
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*
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* Created:
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* Description:
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*
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* Modified:
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* Copyright 2004-2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __ASM_CPLBINIT_H__
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#define __ASM_CPLBINIT_H__
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#include <asm/blackfin.h>
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#include <asm/cplb.h>
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#include <linux/threads.h>
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#ifdef CONFIG_CPLB_SWITCH_TAB_L1
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# define PDT_ATTR __attribute__((l1_data))
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#else
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# define PDT_ATTR
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#endif
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struct cplb_entry {
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unsigned long data, addr;
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};
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struct cplb_boundary {
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unsigned long eaddr; /* End of this region. */
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unsigned long data; /* CPLB data value. */
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};
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extern struct cplb_boundary dcplb_bounds[];
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extern struct cplb_boundary icplb_bounds[];
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extern int dcplb_nr_bounds, icplb_nr_bounds;
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extern struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS];
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extern struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS];
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extern int first_switched_icplb;
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extern int first_switched_dcplb;
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extern int nr_dcplb_miss[], nr_icplb_miss[], nr_icplb_supv_miss[];
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extern int nr_dcplb_prot[], nr_cplb_flush[];
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#ifdef CONFIG_MPU
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extern int first_mask_dcplb;
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extern int page_mask_order;
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extern int page_mask_nelts;
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extern unsigned long *current_rwx_mask[NR_CPUS];
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extern void flush_switched_cplbs(unsigned int);
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extern void set_mask_dcplbs(unsigned long *, unsigned int);
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extern void __noreturn panic_cplb_error(int seqstat, struct pt_regs *);
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#endif /* CONFIG_MPU */
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extern void bfin_icache_init(struct cplb_entry *icplb_tbl);
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extern void bfin_dcache_init(struct cplb_entry *icplb_tbl);
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#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
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extern void generate_cplb_tables_all(void);
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extern void generate_cplb_tables_cpu(unsigned int cpu);
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#endif
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#endif
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