407 lines
12 KiB
C
407 lines
12 KiB
C
/*
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* Copyright (C) 2001, 2002, 2003 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#define SBPROF_TB_DEBUG 0
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/smp_lock.h>
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#include <linux/wait.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/sibyte/sb1250.h>
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_scd.h>
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#include <asm/sibyte/sb1250_int.h>
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#include <asm/sibyte/trace_prof.h>
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#define DEVNAME "bcm1250_tbprof"
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static struct sbprof_tb sbp;
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#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
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/************************************************************************
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* Support for ZBbus sampling using the trace buffer
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*
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* We use the SCD performance counter interrupt, caused by a Zclk counter
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* overflow, to trigger the start of tracing.
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*
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* We set the trace buffer to sample everything and freeze on
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* overflow.
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*
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* We map the interrupt for trace_buffer_freeze to handle it on CPU 0.
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*
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************************************************************************/
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static u_int64_t tb_period;
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static void arm_tb(void)
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{
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u_int64_t scdperfcnt;
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u_int64_t next = (1ULL << 40) - tb_period;
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u_int64_t tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
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/* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
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trigger start of trace. XXX vary sampling period */
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__raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
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scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
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/* Unfortunately, in Pass 2 we must clear all counters to knock down
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a previous interrupt request. This means that bus profiling
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requires ALL of the SCD perf counters. */
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__raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
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// keep counters 0,2,3 as is
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M_SPC_CFG_ENABLE | // enable counting
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M_SPC_CFG_CLEAR | // clear all counters
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V_SPC_CFG_SRC1(1), // counter 1 counts cycles
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IOADDR(A_SCD_PERF_CNT_CFG));
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__raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
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/* Reset the trace buffer */
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__raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
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#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
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/* XXXKW may want to expose control to the data-collector */
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tb_options |= M_SCD_TRACE_CFG_FORCECNT;
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#endif
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__raw_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG));
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sbp.tb_armed = 1;
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}
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static irqreturn_t sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs)
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{
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int i;
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DBG(printk(DEVNAME ": tb_intr\n"));
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if (sbp.next_tb_sample < MAX_TB_SAMPLES) {
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/* XXX should use XKPHYS to make writes bypass L2 */
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u_int64_t *p = sbp.sbprof_tbbuf[sbp.next_tb_sample++];
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/* Read out trace */
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__raw_writeq(M_SCD_TRACE_CFG_START_READ,
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IOADDR(A_SCD_TRACE_CFG));
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__asm__ __volatile__ ("sync" : : : "memory");
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/* Loop runs backwards because bundles are read out in reverse order */
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for (i = 256 * 6; i > 0; i -= 6) {
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// Subscripts decrease to put bundle in the order
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// t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi
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p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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// read t2 hi
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p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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// read t2 lo
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p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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// read t1 hi
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p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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// read t1 lo
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p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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// read t0 hi
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p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
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// read t0 lo
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}
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if (!sbp.tb_enable) {
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DBG(printk(DEVNAME ": tb_intr shutdown\n"));
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__raw_writeq(M_SCD_TRACE_CFG_RESET,
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IOADDR(A_SCD_TRACE_CFG));
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sbp.tb_armed = 0;
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wake_up(&sbp.tb_sync);
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} else {
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arm_tb(); // knock down current interrupt and get another one later
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}
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} else {
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/* No more trace buffer samples */
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DBG(printk(DEVNAME ": tb_intr full\n"));
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__raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
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sbp.tb_armed = 0;
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if (!sbp.tb_enable) {
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wake_up(&sbp.tb_sync);
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}
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wake_up(&sbp.tb_read);
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}
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return IRQ_HANDLED;
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}
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static irqreturn_t sbprof_pc_intr(int irq, void *dev_id, struct pt_regs *regs)
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{
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printk(DEVNAME ": unexpected pc_intr");
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return IRQ_NONE;
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}
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int sbprof_zbprof_start(struct file *filp)
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{
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u_int64_t scdperfcnt;
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if (sbp.tb_enable)
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return -EBUSY;
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DBG(printk(DEVNAME ": starting\n"));
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sbp.tb_enable = 1;
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sbp.next_tb_sample = 0;
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filp->f_pos = 0;
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if (request_irq
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(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0, DEVNAME " trace freeze", &sbp)) {
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return -EBUSY;
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}
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/* Make sure there isn't a perf-cnt interrupt waiting */
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scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
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/* Disable and clear counters, override SRC_1 */
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__raw_writeq((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) |
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M_SPC_CFG_ENABLE | M_SPC_CFG_CLEAR | V_SPC_CFG_SRC1(1),
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IOADDR(A_SCD_PERF_CNT_CFG));
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/* We grab this interrupt to prevent others from trying to use
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it, even though we don't want to service the interrupts
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(they only feed into the trace-on-interrupt mechanism) */
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if (request_irq
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(K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
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free_irq(K_INT_TRACE_FREEZE, &sbp);
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return -EBUSY;
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}
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/* I need the core to mask these, but the interrupt mapper to
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pass them through. I am exploiting my knowledge that
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cp0_status masks out IP[5]. krw */
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__raw_writeq(K_INT_MAP_I3,
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IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
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(K_INT_PERF_CNT << 3)));
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/* Initialize address traps */
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_1));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_2));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_3));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_0));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_1));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_2));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_DOWN_3));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_0));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_1));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_2));
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__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
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/* Initialize Trace Event 0-7 */
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// when interrupt
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__raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_3));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_4));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_5));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_6));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_7));
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/* Initialize Trace Sequence 0-7 */
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// Start on event 0 (interrupt)
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__raw_writeq(V_SCD_TRSEQ_FUNC_START | 0x0fff,
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IOADDR(A_SCD_TRACE_SEQUENCE_0));
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// dsamp when d used | asamp when a used
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__raw_writeq(M_SCD_TRSEQ_ASAMPLE | M_SCD_TRSEQ_DSAMPLE |
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K_SCD_TRSEQ_TRIGGER_ALL,
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IOADDR(A_SCD_TRACE_SEQUENCE_1));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_2));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_3));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_4));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_5));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_6));
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__raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
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/* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
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__raw_writeq(1ULL << K_INT_PERF_CNT,
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IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
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arm_tb();
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DBG(printk(DEVNAME ": done starting\n"));
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return 0;
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}
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int sbprof_zbprof_stop(void)
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{
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DEFINE_WAIT(wait);
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DBG(printk(DEVNAME ": stopping\n"));
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if (sbp.tb_enable) {
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sbp.tb_enable = 0;
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/* XXXKW there is a window here where the intr handler
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may run, see the disable, and do the wake_up before
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this sleep happens. */
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if (sbp.tb_armed) {
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DBG(printk(DEVNAME ": wait for disarm\n"));
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prepare_to_wait(&sbp.tb_sync, &wait, TASK_INTERRUPTIBLE);
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schedule();
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finish_wait(&sbp.tb_sync, &wait);
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DBG(printk(DEVNAME ": disarm complete\n"));
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}
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free_irq(K_INT_TRACE_FREEZE, &sbp);
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free_irq(K_INT_PERF_CNT, &sbp);
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}
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DBG(printk(DEVNAME ": done stopping\n"));
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return 0;
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}
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static int sbprof_tb_open(struct inode *inode, struct file *filp)
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{
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int minor;
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minor = iminor(inode);
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if (minor != 0) {
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return -ENODEV;
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}
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if (sbp.open) {
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return -EBUSY;
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}
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memset(&sbp, 0, sizeof(struct sbprof_tb));
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sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
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if (!sbp.sbprof_tbbuf) {
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return -ENOMEM;
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}
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memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
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init_waitqueue_head(&sbp.tb_sync);
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init_waitqueue_head(&sbp.tb_read);
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sbp.open = 1;
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return 0;
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}
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static int sbprof_tb_release(struct inode *inode, struct file *filp)
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{
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int minor;
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minor = iminor(inode);
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if (minor != 0 || !sbp.open) {
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return -ENODEV;
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}
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if (sbp.tb_armed || sbp.tb_enable) {
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sbprof_zbprof_stop();
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}
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vfree(sbp.sbprof_tbbuf);
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sbp.open = 0;
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return 0;
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}
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static ssize_t sbprof_tb_read(struct file *filp, char *buf,
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size_t size, loff_t *offp)
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{
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int cur_sample, sample_off, cur_count, sample_left;
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char *src;
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int count = 0;
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char *dest = buf;
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long cur_off = *offp;
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count = 0;
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cur_sample = cur_off / TB_SAMPLE_SIZE;
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sample_off = cur_off % TB_SAMPLE_SIZE;
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sample_left = TB_SAMPLE_SIZE - sample_off;
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while (size && (cur_sample < sbp.next_tb_sample)) {
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cur_count = size < sample_left ? size : sample_left;
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src = (char *)(((long)sbp.sbprof_tbbuf[cur_sample])+sample_off);
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copy_to_user(dest, src, cur_count);
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DBG(printk(DEVNAME ": read from sample %d, %d bytes\n",
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cur_sample, cur_count));
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size -= cur_count;
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sample_left -= cur_count;
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if (!sample_left) {
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cur_sample++;
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sample_off = 0;
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sample_left = TB_SAMPLE_SIZE;
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} else {
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sample_off += cur_count;
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}
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cur_off += cur_count;
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dest += cur_count;
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count += cur_count;
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}
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*offp = cur_off;
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return count;
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}
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static long sbprof_tb_ioctl(struct file *filp,
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unsigned int command,
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unsigned long arg)
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{
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int error = 0;
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lock_kernel();
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switch (command) {
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case SBPROF_ZBSTART:
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error = sbprof_zbprof_start(filp);
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break;
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case SBPROF_ZBSTOP:
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error = sbprof_zbprof_stop();
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break;
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case SBPROF_ZBWAITFULL:
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DEFINE_WAIT(wait);
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prepare_to_wait(&sbp.tb_read, &wait, TASK_INTERRUPTIBLE);
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schedule();
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finish_wait(&sbp.tb_read, &wait);
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/* XXXKW check if interrupted? */
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return put_user(TB_FULL, (int *) arg);
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default:
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error = -EINVAL;
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break;
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}
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unlock_kernel();
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return error;
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}
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static struct file_operations sbprof_tb_fops = {
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.owner = THIS_MODULE,
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.open = sbprof_tb_open,
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.release = sbprof_tb_release,
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.read = sbprof_tb_read,
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.unlocked_ioctl = sbprof_tb_ioctl,
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.compat_ioctl = sbprof_tb_ioctl,
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.mmap = NULL,
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};
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static int __init sbprof_tb_init(void)
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{
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if (register_chrdev(SBPROF_TB_MAJOR, DEVNAME, &sbprof_tb_fops)) {
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printk(KERN_WARNING DEVNAME ": initialization failed (dev %d)\n",
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SBPROF_TB_MAJOR);
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return -EIO;
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}
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sbp.open = 0;
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tb_period = zbbus_mhz * 10000LL;
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printk(KERN_INFO DEVNAME ": initialized - tb_period = %lld\n", tb_period);
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return 0;
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}
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static void __exit sbprof_tb_cleanup(void)
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{
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unregister_chrdev(SBPROF_TB_MAJOR, DEVNAME);
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}
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module_init(sbprof_tb_init);
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module_exit(sbprof_tb_cleanup);
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