110 lines
3.3 KiB
C
110 lines
3.3 KiB
C
/*
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* memory fill offload engine support
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*
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* Copyright © 2006, Intel Corporation.
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*
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* Dan Williams <dan.j.williams@intel.com>
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*
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* with architecture considerations by:
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* Neil Brown <neilb@suse.de>
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* Jeff Garzik <jeff@garzik.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <linux/async_tx.h>
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/**
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* async_memset - attempt to fill memory with a dma engine.
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* @dest: destination page
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* @val: fill value
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* @offset: offset in pages to start transaction
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* @len: length in bytes
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* @flags: ASYNC_TX_ASSUME_COHERENT, ASYNC_TX_ACK, ASYNC_TX_DEP_ACK
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* @depend_tx: memset depends on the result of this transaction
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* @cb_fn: function to call when the memcpy completes
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* @cb_param: parameter to pass to the callback routine
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*/
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struct dma_async_tx_descriptor *
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async_memset(struct page *dest, int val, unsigned int offset,
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size_t len, enum async_tx_flags flags,
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struct dma_async_tx_descriptor *depend_tx,
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dma_async_tx_callback cb_fn, void *cb_param)
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{
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struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_MEMSET);
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struct dma_device *device = chan ? chan->device : NULL;
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int int_en = cb_fn ? 1 : 0;
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struct dma_async_tx_descriptor *tx = device ?
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device->device_prep_dma_memset(chan, val, len,
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int_en) : NULL;
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if (tx) { /* run the memset asynchronously */
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dma_addr_t dma_addr;
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enum dma_data_direction dir;
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pr_debug("%s: (async) len: %zu\n", __FUNCTION__, len);
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dir = (flags & ASYNC_TX_ASSUME_COHERENT) ?
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DMA_NONE : DMA_FROM_DEVICE;
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dma_addr = dma_map_page(device->dev, dest, offset, len, dir);
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tx->tx_set_dest(dma_addr, tx, 0);
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async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
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} else { /* run the memset synchronously */
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void *dest_buf;
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pr_debug("%s: (sync) len: %zu\n", __FUNCTION__, len);
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dest_buf = (void *) (((char *) page_address(dest)) + offset);
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/* wait for any prerequisite operations */
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if (depend_tx) {
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/* if ack is already set then we cannot be sure
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* we are referring to the correct operation
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*/
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BUG_ON(depend_tx->ack);
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if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
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panic("%s: DMA_ERROR waiting for depend_tx\n",
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__FUNCTION__);
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}
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memset(dest_buf, val, len);
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async_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param);
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}
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return tx;
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}
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EXPORT_SYMBOL_GPL(async_memset);
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static int __init async_memset_init(void)
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{
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return 0;
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}
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static void __exit async_memset_exit(void)
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{
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do { } while (0);
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}
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module_init(async_memset_init);
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module_exit(async_memset_exit);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("asynchronous memset api");
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MODULE_LICENSE("GPL");
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