157 lines
4.4 KiB
C
157 lines
4.4 KiB
C
#ifndef _S390_TLB_H
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#define _S390_TLB_H
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/*
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* TLB flushing on s390 is complicated. The following requirement
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* from the principles of operation is the most arduous:
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*
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* "A valid table entry must not be changed while it is attached
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* to any CPU and may be used for translation by that CPU except to
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* (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY,
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* or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page
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* table entry, or (3) make a change by means of a COMPARE AND SWAP
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* AND PURGE instruction that purges the TLB."
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*
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* The modification of a pte of an active mm struct therefore is
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* a two step process: i) invalidate the pte, ii) store the new pte.
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* This is true for the page protection bit as well.
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* The only possible optimization is to flush at the beginning of
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* a tlb_gather_mmu cycle if the mm_struct is currently not in use.
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*
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* Pages used for the page tables is a different story. FIXME: more
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*/
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <asm/processor.h>
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#include <asm/pgalloc.h>
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#include <asm/smp.h>
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#include <asm/tlbflush.h>
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#ifndef CONFIG_SMP
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#define TLB_NR_PTRS 1
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#else
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#define TLB_NR_PTRS 508
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#endif
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struct mmu_gather {
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struct mm_struct *mm;
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unsigned int fullmm;
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unsigned int nr_ptes;
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unsigned int nr_pxds;
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void *array[TLB_NR_PTRS];
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};
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DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
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static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm,
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unsigned int full_mm_flush)
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{
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struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
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tlb->mm = mm;
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tlb->fullmm = full_mm_flush || (num_online_cpus() == 1) ||
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(atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm);
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tlb->nr_ptes = 0;
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tlb->nr_pxds = TLB_NR_PTRS;
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if (tlb->fullmm)
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__tlb_flush_mm(mm);
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return tlb;
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}
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static inline void tlb_flush_mmu(struct mmu_gather *tlb,
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unsigned long start, unsigned long end)
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{
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if (!tlb->fullmm && (tlb->nr_ptes > 0 || tlb->nr_pxds < TLB_NR_PTRS))
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__tlb_flush_mm(tlb->mm);
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while (tlb->nr_ptes > 0)
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pte_free(tlb->mm, tlb->array[--tlb->nr_ptes]);
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while (tlb->nr_pxds < TLB_NR_PTRS)
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/* pgd_free frees the pointer as region or segment table */
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pgd_free(tlb->mm, tlb->array[tlb->nr_pxds++]);
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}
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static inline void tlb_finish_mmu(struct mmu_gather *tlb,
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unsigned long start, unsigned long end)
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{
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tlb_flush_mmu(tlb, start, end);
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/* keep the page table cache within bounds */
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check_pgt_cache();
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put_cpu_var(mmu_gathers);
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}
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/*
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* Release the page cache reference for a pte removed by
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* tlb_ptep_clear_flush. In both flush modes the tlb fo a page cache page
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* has already been freed, so just do free_page_and_swap_cache.
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*/
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static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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free_page_and_swap_cache(page);
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}
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/*
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* pte_free_tlb frees a pte table and clears the CRSTE for the
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* page table from the tlb.
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*/
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static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte)
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{
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if (!tlb->fullmm) {
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tlb->array[tlb->nr_ptes++] = pte;
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if (tlb->nr_ptes >= tlb->nr_pxds)
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tlb_flush_mmu(tlb, 0, 0);
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} else
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pte_free(tlb->mm, pte);
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}
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/*
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* pmd_free_tlb frees a pmd table and clears the CRSTE for the
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* segment table entry from the tlb.
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* If the mm uses a two level page table the single pmd is freed
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* as the pgd. pmd_free_tlb checks the asce_limit against 2GB
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* to avoid the double free of the pmd in this case.
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*/
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static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
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{
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#ifdef __s390x__
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if (tlb->mm->context.asce_limit <= (1UL << 31))
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return;
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if (!tlb->fullmm) {
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tlb->array[--tlb->nr_pxds] = pmd;
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if (tlb->nr_ptes >= tlb->nr_pxds)
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tlb_flush_mmu(tlb, 0, 0);
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} else
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pmd_free(tlb->mm, pmd);
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#endif
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}
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/*
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* pud_free_tlb frees a pud table and clears the CRSTE for the
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* region third table entry from the tlb.
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* If the mm uses a three level page table the single pud is freed
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* as the pgd. pud_free_tlb checks the asce_limit against 4TB
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* to avoid the double free of the pud in this case.
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*/
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static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
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{
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#ifdef __s390x__
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if (tlb->mm->context.asce_limit <= (1UL << 42))
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return;
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if (!tlb->fullmm) {
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tlb->array[--tlb->nr_pxds] = pud;
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if (tlb->nr_ptes >= tlb->nr_pxds)
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tlb_flush_mmu(tlb, 0, 0);
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} else
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pud_free(tlb->mm, pud);
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#endif
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}
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#define tlb_start_vma(tlb, vma) do { } while (0)
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#define tlb_end_vma(tlb, vma) do { } while (0)
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#define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0)
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#define tlb_migrate_finish(mm) do { } while (0)
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#endif /* _S390_TLB_H */
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