776 lines
20 KiB
C
776 lines
20 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1999,2001-2006 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/kdev_t.h>
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#include <linux/string.h>
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#include <linux/screen_info.h>
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#include <linux/console.h>
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#include <linux/timex.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/serial.h>
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#include <linux/irq.h>
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#include <linux/bootmem.h>
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#include <linux/mmzone.h>
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#include <linux/interrupt.h>
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#include <linux/acpi.h>
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#include <linux/compiler.h>
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#include <linux/root_dev.h>
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#include <linux/nodemask.h>
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#include <linux/pm.h>
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#include <linux/efi.h>
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#include <asm/io.h>
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#include <asm/sal.h>
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#include <asm/machvec.h>
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#include <asm/system.h>
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#include <asm/processor.h>
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#include <asm/vga.h>
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#include <asm/sn/arch.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/pda.h>
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#include <asm/sn/nodepda.h>
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#include <asm/sn/sn_cpuid.h>
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#include <asm/sn/simulator.h>
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#include <asm/sn/leds.h>
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#include <asm/sn/bte.h>
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#include <asm/sn/shub_mmr.h>
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#include <asm/sn/clksupport.h>
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#include <asm/sn/sn_sal.h>
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#include <asm/sn/geo.h>
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#include <asm/sn/sn_feature_sets.h>
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#include "xtalk/xwidgetdev.h"
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#include "xtalk/hubdev.h"
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#include <asm/sn/klconfig.h>
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DEFINE_PER_CPU(struct pda_s, pda_percpu);
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#define MAX_PHYS_MEMORY (1UL << IA64_MAX_PHYS_BITS) /* Max physical address supported */
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extern void bte_init_node(nodepda_t *, cnodeid_t);
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extern void sn_timer_init(void);
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extern unsigned long last_time_offset;
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extern void (*ia64_mark_idle) (int);
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extern void snidle(int);
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unsigned long sn_rtc_cycles_per_second;
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EXPORT_SYMBOL(sn_rtc_cycles_per_second);
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DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
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EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
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DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_COMPACT_NODES]);
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EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
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DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
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EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
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char sn_system_serial_number_string[128];
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EXPORT_SYMBOL(sn_system_serial_number_string);
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u64 sn_partition_serial_number;
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EXPORT_SYMBOL(sn_partition_serial_number);
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u8 sn_partition_id;
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EXPORT_SYMBOL(sn_partition_id);
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u8 sn_system_size;
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EXPORT_SYMBOL(sn_system_size);
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u8 sn_sharing_domain_size;
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EXPORT_SYMBOL(sn_sharing_domain_size);
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u8 sn_coherency_id;
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EXPORT_SYMBOL(sn_coherency_id);
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u8 sn_region_size;
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EXPORT_SYMBOL(sn_region_size);
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int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
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short physical_node_map[MAX_NUMALINK_NODES];
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static unsigned long sn_prom_features[MAX_PROM_FEATURE_SETS];
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EXPORT_SYMBOL(physical_node_map);
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int num_cnodes;
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static void sn_init_pdas(char **);
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static void build_cnode_tables(void);
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static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
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/*
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* The format of "screen_info" is strange, and due to early i386-setup
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* code. This is just enough to make the console code think we're on a
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* VGA color display.
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*/
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struct screen_info sn_screen_info = {
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.orig_x = 0,
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.orig_y = 0,
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.orig_video_mode = 3,
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.orig_video_cols = 80,
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.orig_video_ega_bx = 3,
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.orig_video_lines = 25,
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.orig_video_isVGA = 1,
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.orig_video_points = 16
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};
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/*
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* This routine can only be used during init, since
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* smp_boot_data is an init data structure.
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* We have to use smp_boot_data.cpu_phys_id to find
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* the physical id of the processor because the normal
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* cpu_physical_id() relies on data structures that
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* may not be initialized yet.
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*/
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static int __init pxm_to_nasid(int pxm)
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{
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int i;
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int nid;
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nid = pxm_to_node(pxm);
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for (i = 0; i < num_node_memblks; i++) {
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if (node_memblk[i].nid == nid) {
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return NASID_GET(node_memblk[i].start_paddr);
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}
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}
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return -1;
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}
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/**
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* early_sn_setup - early setup routine for SN platforms
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*
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* Sets up an initial console to aid debugging. Intended primarily
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* for bringup. See start_kernel() in init/main.c.
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*/
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void __init early_sn_setup(void)
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{
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efi_system_table_t *efi_systab;
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efi_config_table_t *config_tables;
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struct ia64_sal_systab *sal_systab;
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struct ia64_sal_desc_entry_point *ep;
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char *p;
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int i, j;
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/*
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* Parse enough of the SAL tables to locate the SAL entry point. Since, console
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* IO on SN2 is done via SAL calls, early_printk won't work without this.
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*
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* This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
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* Any changes to those file may have to be made here as well.
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*/
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efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
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config_tables = __va(efi_systab->tables);
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for (i = 0; i < efi_systab->nr_tables; i++) {
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if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
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0) {
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sal_systab = __va(config_tables[i].table);
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p = (char *)(sal_systab + 1);
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for (j = 0; j < sal_systab->entry_count; j++) {
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if (*p == SAL_DESC_ENTRY_POINT) {
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ep = (struct ia64_sal_desc_entry_point
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*)p;
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ia64_sal_handler_init(__va
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(ep->sal_proc),
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__va(ep->gp));
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return;
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}
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p += SAL_DESC_SIZE(*p);
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}
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}
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}
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/* Uh-oh, SAL not available?? */
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printk(KERN_ERR "failed to find SAL entry point\n");
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}
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extern int platform_intr_list[];
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static int __cpuinitdata shub_1_1_found;
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/*
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* sn_check_for_wars
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*
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* Set flag for enabling shub specific wars
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*/
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static inline int __cpuinit is_shub_1_1(int nasid)
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{
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unsigned long id;
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int rev;
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if (is_shub2())
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return 0;
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id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
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rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
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return rev <= 2;
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}
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static void __cpuinit sn_check_for_wars(void)
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{
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int cnode;
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if (is_shub2()) {
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/* none yet */
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} else {
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for_each_online_node(cnode) {
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if (is_shub_1_1(cnodeid_to_nasid(cnode)))
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shub_1_1_found = 1;
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}
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}
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}
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/*
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* Scan the EFI PCDP table (if it exists) for an acceptable VGA console
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* output device. If one exists, pick it and set sn_legacy_{io,mem} to
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* reflect the bus offsets needed to address it.
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*
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* Since pcdp support in SN is not supported in the 2.4 kernel (or at least
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* the one lbs is based on) just declare the needed structs here.
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*
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* Reference spec http://www.dig64.org/specifications/DIG64_PCDPv20.pdf
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*
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* Returns 0 if no acceptable vga is found, !0 otherwise.
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*
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* Note: This stuff is duped here because Altix requires the PCDP to
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* locate a usable VGA device due to lack of proper ACPI support. Structures
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* could be used from drivers/firmware/pcdp.h, but it was decided that moving
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* this file to a more public location just for Altix use was undesirable.
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*/
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struct hcdp_uart_desc {
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u8 pad[45];
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};
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struct pcdp {
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u8 signature[4]; /* should be 'HCDP' */
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u32 length;
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u8 rev; /* should be >=3 for pcdp, <3 for hcdp */
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u8 sum;
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u8 oem_id[6];
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u64 oem_tableid;
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u32 oem_rev;
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u32 creator_id;
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u32 creator_rev;
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u32 num_type0;
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struct hcdp_uart_desc uart[0]; /* num_type0 of these */
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/* pcdp descriptors follow */
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} __attribute__((packed));
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struct pcdp_device_desc {
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u8 type;
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u8 primary;
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u16 length;
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u16 index;
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/* interconnect specific structure follows */
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/* device specific structure follows that */
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} __attribute__((packed));
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struct pcdp_interface_pci {
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u8 type; /* 1 == pci */
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u8 reserved;
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u16 length;
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u8 segment;
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u8 bus;
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u8 dev;
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u8 fun;
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u16 devid;
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u16 vendid;
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u32 acpi_interrupt;
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u64 mmio_tra;
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u64 ioport_tra;
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u8 flags;
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u8 translation;
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} __attribute__((packed));
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struct pcdp_vga_device {
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u8 num_eas_desc;
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/* ACPI Extended Address Space Desc follows */
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} __attribute__((packed));
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/* from pcdp_device_desc.primary */
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#define PCDP_PRIMARY_CONSOLE 0x01
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/* from pcdp_device_desc.type */
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#define PCDP_CONSOLE_INOUT 0x0
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#define PCDP_CONSOLE_DEBUG 0x1
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#define PCDP_CONSOLE_OUT 0x2
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#define PCDP_CONSOLE_IN 0x3
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#define PCDP_CONSOLE_TYPE_VGA 0x8
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#define PCDP_CONSOLE_VGA (PCDP_CONSOLE_TYPE_VGA | PCDP_CONSOLE_OUT)
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/* from pcdp_interface_pci.type */
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#define PCDP_IF_PCI 1
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/* from pcdp_interface_pci.translation */
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#define PCDP_PCI_TRANS_IOPORT 0x02
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#define PCDP_PCI_TRANS_MMIO 0x01
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#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
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static void
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sn_scan_pcdp(void)
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{
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u8 *bp;
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struct pcdp *pcdp;
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struct pcdp_device_desc device;
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struct pcdp_interface_pci if_pci;
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extern struct efi efi;
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if (efi.hcdp == EFI_INVALID_TABLE_ADDR)
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return; /* no hcdp/pcdp table */
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pcdp = __va(efi.hcdp);
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if (pcdp->rev < 3)
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return; /* only support PCDP (rev >= 3) */
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for (bp = (u8 *)&pcdp->uart[pcdp->num_type0];
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bp < (u8 *)pcdp + pcdp->length;
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bp += device.length) {
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memcpy(&device, bp, sizeof(device));
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if (! (device.primary & PCDP_PRIMARY_CONSOLE))
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continue; /* not primary console */
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if (device.type != PCDP_CONSOLE_VGA)
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continue; /* not VGA descriptor */
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memcpy(&if_pci, bp+sizeof(device), sizeof(if_pci));
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if (if_pci.type != PCDP_IF_PCI)
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continue; /* not PCI interconnect */
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if (if_pci.translation & PCDP_PCI_TRANS_IOPORT)
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vga_console_iobase = if_pci.ioport_tra;
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if (if_pci.translation & PCDP_PCI_TRANS_MMIO)
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vga_console_membase =
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if_pci.mmio_tra | __IA64_UNCACHED_OFFSET;
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break; /* once we find the primary, we're done */
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}
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}
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#endif
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static unsigned long sn2_rtc_initial;
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/**
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* sn_setup - SN platform setup routine
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* @cmdline_p: kernel command line
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*
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* Handles platform setup for SN machines. This includes determining
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* the RTC frequency (via a SAL call), initializing secondary CPUs, and
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* setting up per-node data areas. The console is also initialized here.
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*/
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void __init sn_setup(char **cmdline_p)
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{
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long status, ticks_per_sec, drift;
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u32 version = sn_sal_rev();
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extern void sn_cpu_init(void);
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sn2_rtc_initial = rtc_time();
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ia64_sn_plat_set_error_handling_features(); // obsolete
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ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV);
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ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES);
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/*
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* Note: The calls to notify the PROM of ACPI and PCI Segment
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* support must be done prior to acpi_load_tables(), as
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* an ACPI capable PROM will rebuild the DSDT as result
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* of the call.
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*/
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ia64_sn_set_os_feature(OSF_PCISEGMENT_ENABLE);
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ia64_sn_set_os_feature(OSF_ACPI_ENABLE);
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/* Load the new DSDT and SSDT tables into the global table list. */
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acpi_table_init();
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#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
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/*
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* Handle SN vga console.
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*
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* SN systems do not have enough ACPI table information
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* being passed from prom to identify VGA adapters and the legacy
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* addresses to access them. Until that is done, SN systems rely
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* on the PCDP table to identify the primary VGA console if one
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* exists.
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*
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* However, kernel PCDP support is optional, and even if it is built
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* into the kernel, it will not be used if the boot cmdline contains
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* console= directives.
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*
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* So, to work around this mess, we duplicate some of the PCDP code
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* here so that the primary VGA console (as defined by PCDP) will
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* work on SN systems even if a different console (e.g. serial) is
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* selected on the boot line (or CONFIG_EFI_PCDP is off).
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*/
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if (! vga_console_membase)
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sn_scan_pcdp();
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/*
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* Setup legacy IO space.
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* vga_console_iobase maps to PCI IO Space address 0 on the
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* bus containing the VGA console.
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*/
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if (vga_console_iobase) {
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io_space[0].mmio_base =
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(unsigned long) ioremap(vga_console_iobase, 0);
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io_space[0].sparse = 0;
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}
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if (vga_console_membase) {
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/* usable vga ... make tty0 the preferred default console */
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if (!strstr(*cmdline_p, "console="))
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add_preferred_console("tty", 0, NULL);
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} else {
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printk(KERN_DEBUG "SGI: Disabling VGA console\n");
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if (!strstr(*cmdline_p, "console="))
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add_preferred_console("ttySG", 0, NULL);
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#else
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conswitchp = NULL;
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#endif /* CONFIG_DUMMY_CONSOLE */
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}
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#endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
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MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
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/*
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* Build the tables for managing cnodes.
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*/
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build_cnode_tables();
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status =
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ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
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&drift);
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if (status != 0 || ticks_per_sec < 100000) {
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printk(KERN_WARNING
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"unable to determine platform RTC clock frequency, guessing.\n");
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/* PROM gives wrong value for clock freq. so guess */
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sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
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} else
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sn_rtc_cycles_per_second = ticks_per_sec;
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platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
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printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF);
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/*
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* we set the default root device to /dev/hda
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* to make simulation easy
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*/
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ROOT_DEV = Root_HDA1;
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/*
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* Create the PDAs and NODEPDAs for all the cpus.
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*/
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sn_init_pdas(cmdline_p);
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ia64_mark_idle = &snidle;
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/*
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* For the bootcpu, we do this here. All other cpus will make the
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* call as part of cpu_init in slave cpu initialization.
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*/
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sn_cpu_init();
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#ifdef CONFIG_SMP
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init_smp_config();
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#endif
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screen_info = sn_screen_info;
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sn_timer_init();
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/*
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* set pm_power_off to a SAL call to allow
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* sn machines to power off. The SAL call can be replaced
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* by an ACPI interface call when ACPI is fully implemented
|
|
* for sn.
|
|
*/
|
|
pm_power_off = ia64_sn_power_down;
|
|
current->thread.flags |= IA64_THREAD_MIGRATION;
|
|
}
|
|
|
|
/**
|
|
* sn_init_pdas - setup node data areas
|
|
*
|
|
* One time setup for Node Data Area. Called by sn_setup().
|
|
*/
|
|
static void __init sn_init_pdas(char **cmdline_p)
|
|
{
|
|
cnodeid_t cnode;
|
|
|
|
/*
|
|
* Allocate & initialize the nodepda for each node.
|
|
*/
|
|
for_each_online_node(cnode) {
|
|
nodepdaindr[cnode] =
|
|
alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
|
|
memset(nodepdaindr[cnode]->phys_cpuid, -1,
|
|
sizeof(nodepdaindr[cnode]->phys_cpuid));
|
|
spin_lock_init(&nodepdaindr[cnode]->ptc_lock);
|
|
}
|
|
|
|
/*
|
|
* Allocate & initialize nodepda for TIOs. For now, put them on node 0.
|
|
*/
|
|
for (cnode = num_online_nodes(); cnode < num_cnodes; cnode++)
|
|
nodepdaindr[cnode] =
|
|
alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
|
|
|
|
/*
|
|
* Now copy the array of nodepda pointers to each nodepda.
|
|
*/
|
|
for (cnode = 0; cnode < num_cnodes; cnode++)
|
|
memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
|
|
sizeof(nodepdaindr));
|
|
|
|
/*
|
|
* Set up IO related platform-dependent nodepda fields.
|
|
* The following routine actually sets up the hubinfo struct
|
|
* in nodepda.
|
|
*/
|
|
for_each_online_node(cnode) {
|
|
bte_init_node(nodepdaindr[cnode], cnode);
|
|
}
|
|
|
|
/*
|
|
* Initialize the per node hubdev. This includes IO Nodes and
|
|
* headless/memless nodes.
|
|
*/
|
|
for (cnode = 0; cnode < num_cnodes; cnode++) {
|
|
hubdev_init_node(nodepdaindr[cnode], cnode);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* sn_cpu_init - initialize per-cpu data areas
|
|
* @cpuid: cpuid of the caller
|
|
*
|
|
* Called during cpu initialization on each cpu as it starts.
|
|
* Currently, initializes the per-cpu data area for SNIA.
|
|
* Also sets up a few fields in the nodepda. Also known as
|
|
* platform_cpu_init() by the ia64 machvec code.
|
|
*/
|
|
void __cpuinit sn_cpu_init(void)
|
|
{
|
|
int cpuid;
|
|
int cpuphyid;
|
|
int nasid;
|
|
int subnode;
|
|
int slice;
|
|
int cnode;
|
|
int i;
|
|
static int wars_have_been_checked, set_cpu0_number;
|
|
|
|
cpuid = smp_processor_id();
|
|
if (cpuid == 0 && IS_MEDUSA()) {
|
|
if (ia64_sn_is_fake_prom())
|
|
sn_prom_type = 2;
|
|
else
|
|
sn_prom_type = 1;
|
|
printk(KERN_INFO "Running on medusa with %s PROM\n",
|
|
(sn_prom_type == 1) ? "real" : "fake");
|
|
}
|
|
|
|
memset(pda, 0, sizeof(pda));
|
|
if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2,
|
|
&sn_hub_info->nasid_bitmask,
|
|
&sn_hub_info->nasid_shift,
|
|
&sn_system_size, &sn_sharing_domain_size,
|
|
&sn_partition_id, &sn_coherency_id,
|
|
&sn_region_size))
|
|
BUG();
|
|
sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
|
|
|
|
/*
|
|
* Don't check status. The SAL call is not supported on all PROMs
|
|
* but a failure is harmless.
|
|
* Architechtuallly, cpu_init is always called twice on cpu 0. We
|
|
* should set cpu_number on cpu 0 once.
|
|
*/
|
|
if (cpuid == 0) {
|
|
if (!set_cpu0_number) {
|
|
(void) ia64_sn_set_cpu_number(cpuid);
|
|
set_cpu0_number = 1;
|
|
}
|
|
} else
|
|
(void) ia64_sn_set_cpu_number(cpuid);
|
|
|
|
/*
|
|
* The boot cpu makes this call again after platform initialization is
|
|
* complete.
|
|
*/
|
|
if (nodepdaindr[0] == NULL)
|
|
return;
|
|
|
|
for (i = 0; i < MAX_PROM_FEATURE_SETS; i++)
|
|
if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0)
|
|
break;
|
|
|
|
cpuphyid = get_sapicid();
|
|
|
|
if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
|
|
BUG();
|
|
|
|
for (i=0; i < MAX_NUMNODES; i++) {
|
|
if (nodepdaindr[i]) {
|
|
nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
|
|
nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
|
|
nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
|
|
}
|
|
}
|
|
|
|
cnode = nasid_to_cnodeid(nasid);
|
|
|
|
sn_nodepda = nodepdaindr[cnode];
|
|
|
|
pda->led_address =
|
|
(typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
|
|
pda->led_state = LED_ALWAYS_SET;
|
|
pda->hb_count = HZ / 2;
|
|
pda->hb_state = 0;
|
|
pda->idle_flag = 0;
|
|
|
|
if (cpuid != 0) {
|
|
/* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
|
|
memcpy(sn_cnodeid_to_nasid,
|
|
(&per_cpu(__sn_cnodeid_to_nasid, 0)),
|
|
sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
|
|
}
|
|
|
|
/*
|
|
* Check for WARs.
|
|
* Only needs to be done once, on BSP.
|
|
* Has to be done after loop above, because it uses this cpu's
|
|
* sn_cnodeid_to_nasid table which was just initialized if this
|
|
* isn't cpu 0.
|
|
* Has to be done before assignment below.
|
|
*/
|
|
if (!wars_have_been_checked) {
|
|
sn_check_for_wars();
|
|
wars_have_been_checked = 1;
|
|
}
|
|
sn_hub_info->shub_1_1_found = shub_1_1_found;
|
|
|
|
/*
|
|
* Set up addresses of PIO/MEM write status registers.
|
|
*/
|
|
{
|
|
u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
|
|
u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2,
|
|
SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3};
|
|
u64 *pio;
|
|
pio = is_shub1() ? pio1 : pio2;
|
|
pda->pio_write_status_addr =
|
|
(volatile unsigned long *)GLOBAL_MMR_ADDR(nasid, pio[slice]);
|
|
pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
|
|
}
|
|
|
|
/*
|
|
* WAR addresses for SHUB 1.x.
|
|
*/
|
|
if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
|
|
int buddy_nasid;
|
|
buddy_nasid =
|
|
cnodeid_to_nasid(numa_node_id() ==
|
|
num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
|
|
pda->pio_shub_war_cam_addr =
|
|
(volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
|
|
SH1_PI_CAM_CONTROL);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Build tables for converting between NASIDs and cnodes.
|
|
*/
|
|
static inline int __init board_needs_cnode(int type)
|
|
{
|
|
return (type == KLTYPE_SNIA || type == KLTYPE_TIO);
|
|
}
|
|
|
|
void __init build_cnode_tables(void)
|
|
{
|
|
int nasid;
|
|
int node;
|
|
lboard_t *brd;
|
|
|
|
memset(physical_node_map, -1, sizeof(physical_node_map));
|
|
memset(sn_cnodeid_to_nasid, -1,
|
|
sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
|
|
|
|
/*
|
|
* First populate the tables with C/M bricks. This ensures that
|
|
* cnode == node for all C & M bricks.
|
|
*/
|
|
for_each_online_node(node) {
|
|
nasid = pxm_to_nasid(node_to_pxm(node));
|
|
sn_cnodeid_to_nasid[node] = nasid;
|
|
physical_node_map[nasid] = node;
|
|
}
|
|
|
|
/*
|
|
* num_cnodes is total number of C/M/TIO bricks. Because of the 256 node
|
|
* limit on the number of nodes, we can't use the generic node numbers
|
|
* for this. Note that num_cnodes is incremented below as TIOs or
|
|
* headless/memoryless nodes are discovered.
|
|
*/
|
|
num_cnodes = num_online_nodes();
|
|
|
|
/* fakeprom does not support klgraph */
|
|
if (IS_RUNNING_ON_FAKE_PROM())
|
|
return;
|
|
|
|
/* Find TIOs & headless/memoryless nodes and add them to the tables */
|
|
for_each_online_node(node) {
|
|
kl_config_hdr_t *klgraph_header;
|
|
nasid = cnodeid_to_nasid(node);
|
|
klgraph_header = ia64_sn_get_klconfig_addr(nasid);
|
|
BUG_ON(klgraph_header == NULL);
|
|
brd = NODE_OFFSET_TO_LBOARD(nasid, klgraph_header->ch_board_info);
|
|
while (brd) {
|
|
if (board_needs_cnode(brd->brd_type) && physical_node_map[brd->brd_nasid] < 0) {
|
|
sn_cnodeid_to_nasid[num_cnodes] = brd->brd_nasid;
|
|
physical_node_map[brd->brd_nasid] = num_cnodes++;
|
|
}
|
|
brd = find_lboard_next(brd);
|
|
}
|
|
}
|
|
}
|
|
|
|
int
|
|
nasid_slice_to_cpuid(int nasid, int slice)
|
|
{
|
|
long cpu;
|
|
|
|
for (cpu = 0; cpu < nr_cpu_ids; cpu++)
|
|
if (cpuid_to_nasid(cpu) == nasid &&
|
|
cpuid_to_slice(cpu) == slice)
|
|
return cpu;
|
|
|
|
return -1;
|
|
}
|
|
|
|
int sn_prom_feature_available(int id)
|
|
{
|
|
if (id >= BITS_PER_LONG * MAX_PROM_FEATURE_SETS)
|
|
return 0;
|
|
return test_bit(id, sn_prom_features);
|
|
}
|
|
|
|
void
|
|
sn_kernel_launch_event(void)
|
|
{
|
|
/* ignore status until we understand possible failure, if any*/
|
|
if (ia64_sn_kernel_launch_event())
|
|
printk(KERN_ERR "KEXEC is not supported in this PROM, Please update the PROM.\n");
|
|
}
|
|
EXPORT_SYMBOL(sn_prom_feature_available);
|
|
|