936 lines
23 KiB
C
936 lines
23 KiB
C
/*
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* SuperH Mobile LCDC Framebuffer
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*
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* Copyright (c) 2008 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/mm.h>
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#include <linux/fb.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <video/sh_mobile_lcdc.h>
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#include <asm/atomic.h>
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#define PALETTE_NR 16
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struct sh_mobile_lcdc_priv;
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struct sh_mobile_lcdc_chan {
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struct sh_mobile_lcdc_priv *lcdc;
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unsigned long *reg_offs;
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unsigned long ldmt1r_value;
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unsigned long enabled; /* ME and SE in LDCNT2R */
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struct sh_mobile_lcdc_chan_cfg cfg;
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u32 pseudo_palette[PALETTE_NR];
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struct fb_info info;
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dma_addr_t dma_handle;
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struct fb_deferred_io defio;
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unsigned long frame_end;
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wait_queue_head_t frame_end_wait;
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};
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struct sh_mobile_lcdc_priv {
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void __iomem *base;
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int irq;
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#ifdef CONFIG_HAVE_CLK
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atomic_t clk_usecnt;
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struct clk *dot_clk;
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struct clk *clk;
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#endif
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unsigned long lddckr;
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struct sh_mobile_lcdc_chan ch[2];
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};
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/* shared registers */
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#define _LDDCKR 0x410
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#define _LDDCKSTPR 0x414
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#define _LDINTR 0x468
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#define _LDSR 0x46c
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#define _LDCNT1R 0x470
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#define _LDCNT2R 0x474
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#define _LDDDSR 0x47c
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#define _LDDWD0R 0x800
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#define _LDDRDR 0x840
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#define _LDDWAR 0x900
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#define _LDDRAR 0x904
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/* per-channel registers */
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enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R,
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LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR };
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static unsigned long lcdc_offs_mainlcd[] = {
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[LDDCKPAT1R] = 0x400,
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[LDDCKPAT2R] = 0x404,
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[LDMT1R] = 0x418,
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[LDMT2R] = 0x41c,
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[LDMT3R] = 0x420,
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[LDDFR] = 0x424,
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[LDSM1R] = 0x428,
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[LDSM2R] = 0x42c,
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[LDSA1R] = 0x430,
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[LDMLSR] = 0x438,
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[LDHCNR] = 0x448,
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[LDHSYNR] = 0x44c,
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[LDVLNR] = 0x450,
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[LDVSYNR] = 0x454,
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[LDPMR] = 0x460,
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};
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static unsigned long lcdc_offs_sublcd[] = {
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[LDDCKPAT1R] = 0x408,
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[LDDCKPAT2R] = 0x40c,
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[LDMT1R] = 0x600,
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[LDMT2R] = 0x604,
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[LDMT3R] = 0x608,
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[LDDFR] = 0x60c,
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[LDSM1R] = 0x610,
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[LDSM2R] = 0x614,
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[LDSA1R] = 0x618,
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[LDMLSR] = 0x620,
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[LDHCNR] = 0x624,
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[LDHSYNR] = 0x628,
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[LDVLNR] = 0x62c,
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[LDVSYNR] = 0x630,
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[LDPMR] = 0x63c,
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};
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#define START_LCDC 0x00000001
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#define LCDC_RESET 0x00000100
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#define DISPLAY_BEU 0x00000008
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#define LCDC_ENABLE 0x00000001
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#define LDINTR_FE 0x00000400
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#define LDINTR_FS 0x00000004
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static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
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int reg_nr, unsigned long data)
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{
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iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
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}
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static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
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int reg_nr)
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{
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return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
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}
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static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
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unsigned long reg_offs, unsigned long data)
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{
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iowrite32(data, priv->base + reg_offs);
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}
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static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
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unsigned long reg_offs)
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{
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return ioread32(priv->base + reg_offs);
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}
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static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
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unsigned long reg_offs,
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unsigned long mask, unsigned long until)
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{
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while ((lcdc_read(priv, reg_offs) & mask) != until)
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cpu_relax();
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}
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static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
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{
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return chan->cfg.chan == LCDC_CHAN_SUBLCD;
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}
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static void lcdc_sys_write_index(void *handle, unsigned long data)
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{
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struct sh_mobile_lcdc_chan *ch = handle;
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lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
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}
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static void lcdc_sys_write_data(void *handle, unsigned long data)
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{
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struct sh_mobile_lcdc_chan *ch = handle;
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lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
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}
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static unsigned long lcdc_sys_read_data(void *handle)
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{
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struct sh_mobile_lcdc_chan *ch = handle;
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lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
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udelay(1);
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return lcdc_read(ch->lcdc, _LDDRDR) & 0xffff;
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}
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struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
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lcdc_sys_write_index,
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lcdc_sys_write_data,
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lcdc_sys_read_data,
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};
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#ifdef CONFIG_HAVE_CLK
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static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
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{
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if (atomic_inc_and_test(&priv->clk_usecnt)) {
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clk_enable(priv->clk);
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if (priv->dot_clk)
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clk_enable(priv->dot_clk);
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}
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}
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static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
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{
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if (atomic_sub_return(1, &priv->clk_usecnt) == -1) {
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if (priv->dot_clk)
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clk_disable(priv->dot_clk);
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clk_disable(priv->clk);
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}
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}
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#else
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static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) {}
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static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) {}
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#endif
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static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
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struct list_head *pagelist)
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{
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struct sh_mobile_lcdc_chan *ch = info->par;
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/* enable clocks before accessing hardware */
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sh_mobile_lcdc_clk_on(ch->lcdc);
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/* trigger panel update */
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lcdc_write_chan(ch, LDSM2R, 1);
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}
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static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
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{
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struct fb_deferred_io *fbdefio = info->fbdefio;
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if (fbdefio)
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schedule_delayed_work(&info->deferred_work, fbdefio->delay);
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}
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static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
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{
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struct sh_mobile_lcdc_priv *priv = data;
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struct sh_mobile_lcdc_chan *ch;
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unsigned long tmp;
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int is_sub;
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int k;
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/* acknowledge interrupt */
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tmp = lcdc_read(priv, _LDINTR);
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tmp &= 0xffffff00; /* mask in high 24 bits */
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tmp |= 0x000000ff ^ LDINTR_FS; /* status in low 8 */
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lcdc_write(priv, _LDINTR, tmp);
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/* figure out if this interrupt is for main or sub lcd */
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is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
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/* wake up channel and disable clocks*/
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for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
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ch = &priv->ch[k];
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if (!ch->enabled)
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continue;
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if (is_sub == lcdc_chan_is_sublcd(ch)) {
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ch->frame_end = 1;
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wake_up(&ch->frame_end_wait);
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sh_mobile_lcdc_clk_off(priv);
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}
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}
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return IRQ_HANDLED;
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}
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static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
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int start)
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{
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unsigned long tmp = lcdc_read(priv, _LDCNT2R);
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int k;
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/* start or stop the lcdc */
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if (start)
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lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
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else
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lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);
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/* wait until power is applied/stopped on all channels */
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for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
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if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
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while (1) {
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tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
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if (start && tmp == 3)
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break;
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if (!start && tmp == 0)
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break;
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cpu_relax();
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}
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if (!start)
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lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
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}
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static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
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{
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struct sh_mobile_lcdc_chan *ch;
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struct fb_videomode *lcd_cfg;
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struct sh_mobile_lcdc_board_cfg *board_cfg;
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unsigned long tmp;
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int k, m;
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int ret = 0;
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/* enable clocks before accessing the hardware */
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for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
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if (priv->ch[k].enabled)
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sh_mobile_lcdc_clk_on(priv);
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/* reset */
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lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
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lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
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/* enable LCDC channels */
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tmp = lcdc_read(priv, _LDCNT2R);
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tmp |= priv->ch[0].enabled;
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tmp |= priv->ch[1].enabled;
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lcdc_write(priv, _LDCNT2R, tmp);
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/* read data from external memory, avoid using the BEU for now */
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lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);
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/* stop the lcdc first */
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sh_mobile_lcdc_start_stop(priv, 0);
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/* configure clocks */
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tmp = priv->lddckr;
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for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
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ch = &priv->ch[k];
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if (!priv->ch[k].enabled)
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continue;
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m = ch->cfg.clock_divider;
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if (!m)
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continue;
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if (m == 1)
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m = 1 << 6;
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tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
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lcdc_write_chan(ch, LDDCKPAT1R, 0x00000000);
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lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
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}
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lcdc_write(priv, _LDDCKR, tmp);
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/* start dotclock again */
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lcdc_write(priv, _LDDCKSTPR, 0);
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lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
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/* interrupts are disabled to begin with */
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lcdc_write(priv, _LDINTR, 0);
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for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
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ch = &priv->ch[k];
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lcd_cfg = &ch->cfg.lcd_cfg;
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if (!ch->enabled)
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continue;
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tmp = ch->ldmt1r_value;
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tmp |= (lcd_cfg->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
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tmp |= (lcd_cfg->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
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tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
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tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
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tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
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tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
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tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
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lcdc_write_chan(ch, LDMT1R, tmp);
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/* setup SYS bus */
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lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
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lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
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/* horizontal configuration */
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tmp = lcd_cfg->xres + lcd_cfg->hsync_len;
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tmp += lcd_cfg->left_margin;
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tmp += lcd_cfg->right_margin;
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tmp /= 8; /* HTCN */
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tmp |= (lcd_cfg->xres / 8) << 16; /* HDCN */
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lcdc_write_chan(ch, LDHCNR, tmp);
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tmp = lcd_cfg->xres;
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tmp += lcd_cfg->right_margin;
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tmp /= 8; /* HSYNP */
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tmp |= (lcd_cfg->hsync_len / 8) << 16; /* HSYNW */
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lcdc_write_chan(ch, LDHSYNR, tmp);
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/* power supply */
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lcdc_write_chan(ch, LDPMR, 0);
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/* vertical configuration */
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tmp = lcd_cfg->yres + lcd_cfg->vsync_len;
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tmp += lcd_cfg->upper_margin;
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tmp += lcd_cfg->lower_margin; /* VTLN */
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tmp |= lcd_cfg->yres << 16; /* VDLN */
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lcdc_write_chan(ch, LDVLNR, tmp);
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tmp = lcd_cfg->yres;
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tmp += lcd_cfg->lower_margin; /* VSYNP */
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tmp |= lcd_cfg->vsync_len << 16; /* VSYNW */
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lcdc_write_chan(ch, LDVSYNR, tmp);
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board_cfg = &ch->cfg.board_cfg;
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if (board_cfg->setup_sys)
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ret = board_cfg->setup_sys(board_cfg->board_data, ch,
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&sh_mobile_lcdc_sys_bus_ops);
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if (ret)
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return ret;
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}
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/* word and long word swap */
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lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
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for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
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ch = &priv->ch[k];
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if (!priv->ch[k].enabled)
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continue;
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/* set bpp format in PKF[4:0] */
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tmp = lcdc_read_chan(ch, LDDFR);
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tmp &= ~(0x0001001f);
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tmp |= (priv->ch[k].info.var.bits_per_pixel == 16) ? 3 : 0;
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lcdc_write_chan(ch, LDDFR, tmp);
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/* point out our frame buffer */
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lcdc_write_chan(ch, LDSA1R, ch->info.fix.smem_start);
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/* set line size */
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lcdc_write_chan(ch, LDMLSR, ch->info.fix.line_length);
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/* setup deferred io if SYS bus */
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tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
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if (ch->ldmt1r_value & (1 << 12) && tmp) {
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ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
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ch->defio.delay = msecs_to_jiffies(tmp);
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ch->info.fbdefio = &ch->defio;
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fb_deferred_io_init(&ch->info);
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/* one-shot mode */
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lcdc_write_chan(ch, LDSM1R, 1);
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/* enable "Frame End Interrupt Enable" bit */
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lcdc_write(priv, _LDINTR, LDINTR_FE);
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} else {
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/* continuous read mode */
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lcdc_write_chan(ch, LDSM1R, 0);
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}
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}
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/* display output */
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lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);
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/* start the lcdc */
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sh_mobile_lcdc_start_stop(priv, 1);
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/* tell the board code to enable the panel */
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for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
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ch = &priv->ch[k];
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board_cfg = &ch->cfg.board_cfg;
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if (board_cfg->display_on)
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board_cfg->display_on(board_cfg->board_data);
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}
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return 0;
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}
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static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
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{
|
|
struct sh_mobile_lcdc_chan *ch;
|
|
struct sh_mobile_lcdc_board_cfg *board_cfg;
|
|
int k;
|
|
|
|
/* clean up deferred io and ask board code to disable panel */
|
|
for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
|
|
ch = &priv->ch[k];
|
|
|
|
/* deferred io mode:
|
|
* flush frame, and wait for frame end interrupt
|
|
* clean up deferred io and enable clock
|
|
*/
|
|
if (ch->info.fbdefio) {
|
|
ch->frame_end = 0;
|
|
schedule_delayed_work(&ch->info.deferred_work, 0);
|
|
wait_event(ch->frame_end_wait, ch->frame_end);
|
|
fb_deferred_io_cleanup(&ch->info);
|
|
ch->info.fbdefio = NULL;
|
|
sh_mobile_lcdc_clk_on(priv);
|
|
}
|
|
|
|
board_cfg = &ch->cfg.board_cfg;
|
|
if (board_cfg->display_off)
|
|
board_cfg->display_off(board_cfg->board_data);
|
|
|
|
}
|
|
|
|
/* stop the lcdc */
|
|
sh_mobile_lcdc_start_stop(priv, 0);
|
|
|
|
/* stop clocks */
|
|
for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
|
|
if (priv->ch[k].enabled)
|
|
sh_mobile_lcdc_clk_off(priv);
|
|
}
|
|
|
|
static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
|
|
{
|
|
int ifm, miftyp;
|
|
|
|
switch (ch->cfg.interface_type) {
|
|
case RGB8: ifm = 0; miftyp = 0; break;
|
|
case RGB9: ifm = 0; miftyp = 4; break;
|
|
case RGB12A: ifm = 0; miftyp = 5; break;
|
|
case RGB12B: ifm = 0; miftyp = 6; break;
|
|
case RGB16: ifm = 0; miftyp = 7; break;
|
|
case RGB18: ifm = 0; miftyp = 10; break;
|
|
case RGB24: ifm = 0; miftyp = 11; break;
|
|
case SYS8A: ifm = 1; miftyp = 0; break;
|
|
case SYS8B: ifm = 1; miftyp = 1; break;
|
|
case SYS8C: ifm = 1; miftyp = 2; break;
|
|
case SYS8D: ifm = 1; miftyp = 3; break;
|
|
case SYS9: ifm = 1; miftyp = 4; break;
|
|
case SYS12: ifm = 1; miftyp = 5; break;
|
|
case SYS16A: ifm = 1; miftyp = 7; break;
|
|
case SYS16B: ifm = 1; miftyp = 8; break;
|
|
case SYS16C: ifm = 1; miftyp = 9; break;
|
|
case SYS18: ifm = 1; miftyp = 10; break;
|
|
case SYS24: ifm = 1; miftyp = 11; break;
|
|
default: goto bad;
|
|
}
|
|
|
|
/* SUBLCD only supports SYS interface */
|
|
if (lcdc_chan_is_sublcd(ch)) {
|
|
if (ifm == 0)
|
|
goto bad;
|
|
else
|
|
ifm = 0;
|
|
}
|
|
|
|
ch->ldmt1r_value = (ifm << 12) | miftyp;
|
|
return 0;
|
|
bad:
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
|
|
int clock_source,
|
|
struct sh_mobile_lcdc_priv *priv)
|
|
{
|
|
#ifdef CONFIG_HAVE_CLK
|
|
char clk_name[8];
|
|
#endif
|
|
char *str;
|
|
int icksel;
|
|
|
|
switch (clock_source) {
|
|
case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
|
|
case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
|
|
case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
priv->lddckr = icksel << 16;
|
|
|
|
#ifdef CONFIG_HAVE_CLK
|
|
atomic_set(&priv->clk_usecnt, -1);
|
|
snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id);
|
|
priv->clk = clk_get(&pdev->dev, clk_name);
|
|
if (IS_ERR(priv->clk)) {
|
|
dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
|
|
return PTR_ERR(priv->clk);
|
|
}
|
|
|
|
if (str) {
|
|
priv->dot_clk = clk_get(&pdev->dev, str);
|
|
if (IS_ERR(priv->dot_clk)) {
|
|
dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
|
|
clk_put(priv->clk);
|
|
return PTR_ERR(priv->dot_clk);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sh_mobile_lcdc_setcolreg(u_int regno,
|
|
u_int red, u_int green, u_int blue,
|
|
u_int transp, struct fb_info *info)
|
|
{
|
|
u32 *palette = info->pseudo_palette;
|
|
|
|
if (regno >= PALETTE_NR)
|
|
return -EINVAL;
|
|
|
|
/* only FB_VISUAL_TRUECOLOR supported */
|
|
|
|
red >>= 16 - info->var.red.length;
|
|
green >>= 16 - info->var.green.length;
|
|
blue >>= 16 - info->var.blue.length;
|
|
transp >>= 16 - info->var.transp.length;
|
|
|
|
palette[regno] = (red << info->var.red.offset) |
|
|
(green << info->var.green.offset) |
|
|
(blue << info->var.blue.offset) |
|
|
(transp << info->var.transp.offset);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
|
|
.id = "SH Mobile LCDC",
|
|
.type = FB_TYPE_PACKED_PIXELS,
|
|
.visual = FB_VISUAL_TRUECOLOR,
|
|
.accel = FB_ACCEL_NONE,
|
|
};
|
|
|
|
static void sh_mobile_lcdc_fillrect(struct fb_info *info,
|
|
const struct fb_fillrect *rect)
|
|
{
|
|
sys_fillrect(info, rect);
|
|
sh_mobile_lcdc_deferred_io_touch(info);
|
|
}
|
|
|
|
static void sh_mobile_lcdc_copyarea(struct fb_info *info,
|
|
const struct fb_copyarea *area)
|
|
{
|
|
sys_copyarea(info, area);
|
|
sh_mobile_lcdc_deferred_io_touch(info);
|
|
}
|
|
|
|
static void sh_mobile_lcdc_imageblit(struct fb_info *info,
|
|
const struct fb_image *image)
|
|
{
|
|
sys_imageblit(info, image);
|
|
sh_mobile_lcdc_deferred_io_touch(info);
|
|
}
|
|
|
|
static struct fb_ops sh_mobile_lcdc_ops = {
|
|
.fb_setcolreg = sh_mobile_lcdc_setcolreg,
|
|
.fb_read = fb_sys_read,
|
|
.fb_write = fb_sys_write,
|
|
.fb_fillrect = sh_mobile_lcdc_fillrect,
|
|
.fb_copyarea = sh_mobile_lcdc_copyarea,
|
|
.fb_imageblit = sh_mobile_lcdc_imageblit,
|
|
};
|
|
|
|
static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
|
|
{
|
|
switch (bpp) {
|
|
case 16: /* PKF[4:0] = 00011 - RGB 565 */
|
|
var->red.offset = 11;
|
|
var->red.length = 5;
|
|
var->green.offset = 5;
|
|
var->green.length = 6;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 5;
|
|
var->transp.offset = 0;
|
|
var->transp.length = 0;
|
|
break;
|
|
|
|
case 32: /* PKF[4:0] = 00000 - RGB 888
|
|
* sh7722 pdf says 00RRGGBB but reality is GGBB00RR
|
|
* this may be because LDDDSR has word swap enabled..
|
|
*/
|
|
var->red.offset = 0;
|
|
var->red.length = 8;
|
|
var->green.offset = 24;
|
|
var->green.length = 8;
|
|
var->blue.offset = 16;
|
|
var->blue.length = 8;
|
|
var->transp.offset = 0;
|
|
var->transp.length = 0;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
var->bits_per_pixel = bpp;
|
|
var->red.msb_right = 0;
|
|
var->green.msb_right = 0;
|
|
var->blue.msb_right = 0;
|
|
var->transp.msb_right = 0;
|
|
return 0;
|
|
}
|
|
|
|
static int sh_mobile_lcdc_suspend(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
|
|
return 0;
|
|
}
|
|
|
|
static int sh_mobile_lcdc_resume(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
|
|
}
|
|
|
|
static struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
|
|
.suspend = sh_mobile_lcdc_suspend,
|
|
.resume = sh_mobile_lcdc_resume,
|
|
};
|
|
|
|
static int sh_mobile_lcdc_remove(struct platform_device *pdev);
|
|
|
|
static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|
{
|
|
struct fb_info *info;
|
|
struct sh_mobile_lcdc_priv *priv;
|
|
struct sh_mobile_lcdc_info *pdata;
|
|
struct sh_mobile_lcdc_chan_cfg *cfg;
|
|
struct resource *res;
|
|
int error;
|
|
void *buf;
|
|
int i, j;
|
|
|
|
if (!pdev->dev.platform_data) {
|
|
dev_err(&pdev->dev, "no platform data defined\n");
|
|
error = -EINVAL;
|
|
goto err0;
|
|
}
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
i = platform_get_irq(pdev, 0);
|
|
if (!res || i < 0) {
|
|
dev_err(&pdev->dev, "cannot get platform resources\n");
|
|
error = -ENOENT;
|
|
goto err0;
|
|
}
|
|
|
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
|
if (!priv) {
|
|
dev_err(&pdev->dev, "cannot allocate device data\n");
|
|
error = -ENOMEM;
|
|
goto err0;
|
|
}
|
|
|
|
error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
|
|
dev_name(&pdev->dev), priv);
|
|
if (error) {
|
|
dev_err(&pdev->dev, "unable to request irq\n");
|
|
goto err1;
|
|
}
|
|
|
|
priv->irq = i;
|
|
platform_set_drvdata(pdev, priv);
|
|
pdata = pdev->dev.platform_data;
|
|
|
|
j = 0;
|
|
for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
|
|
priv->ch[j].lcdc = priv;
|
|
memcpy(&priv->ch[j].cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
|
|
|
|
error = sh_mobile_lcdc_check_interface(&priv->ch[i]);
|
|
if (error) {
|
|
dev_err(&pdev->dev, "unsupported interface type\n");
|
|
goto err1;
|
|
}
|
|
init_waitqueue_head(&priv->ch[i].frame_end_wait);
|
|
|
|
switch (pdata->ch[i].chan) {
|
|
case LCDC_CHAN_MAINLCD:
|
|
priv->ch[j].enabled = 1 << 1;
|
|
priv->ch[j].reg_offs = lcdc_offs_mainlcd;
|
|
j++;
|
|
break;
|
|
case LCDC_CHAN_SUBLCD:
|
|
priv->ch[j].enabled = 1 << 2;
|
|
priv->ch[j].reg_offs = lcdc_offs_sublcd;
|
|
j++;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!j) {
|
|
dev_err(&pdev->dev, "no channels defined\n");
|
|
error = -EINVAL;
|
|
goto err1;
|
|
}
|
|
|
|
error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
|
|
if (error) {
|
|
dev_err(&pdev->dev, "unable to setup clocks\n");
|
|
goto err1;
|
|
}
|
|
|
|
priv->base = ioremap_nocache(res->start, (res->end - res->start) + 1);
|
|
|
|
for (i = 0; i < j; i++) {
|
|
info = &priv->ch[i].info;
|
|
cfg = &priv->ch[i].cfg;
|
|
|
|
info->fbops = &sh_mobile_lcdc_ops;
|
|
info->var.xres = info->var.xres_virtual = cfg->lcd_cfg.xres;
|
|
info->var.yres = info->var.yres_virtual = cfg->lcd_cfg.yres;
|
|
info->var.width = cfg->lcd_size_cfg.width;
|
|
info->var.height = cfg->lcd_size_cfg.height;
|
|
info->var.activate = FB_ACTIVATE_NOW;
|
|
error = sh_mobile_lcdc_set_bpp(&info->var, cfg->bpp);
|
|
if (error)
|
|
break;
|
|
|
|
info->fix = sh_mobile_lcdc_fix;
|
|
info->fix.line_length = cfg->lcd_cfg.xres * (cfg->bpp / 8);
|
|
info->fix.smem_len = info->fix.line_length * cfg->lcd_cfg.yres;
|
|
|
|
buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
|
|
&priv->ch[i].dma_handle, GFP_KERNEL);
|
|
if (!buf) {
|
|
dev_err(&pdev->dev, "unable to allocate buffer\n");
|
|
error = -ENOMEM;
|
|
break;
|
|
}
|
|
|
|
info->pseudo_palette = &priv->ch[i].pseudo_palette;
|
|
info->flags = FBINFO_FLAG_DEFAULT;
|
|
|
|
error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
|
|
if (error < 0) {
|
|
dev_err(&pdev->dev, "unable to allocate cmap\n");
|
|
dma_free_coherent(&pdev->dev, info->fix.smem_len,
|
|
buf, priv->ch[i].dma_handle);
|
|
break;
|
|
}
|
|
|
|
memset(buf, 0, info->fix.smem_len);
|
|
info->fix.smem_start = priv->ch[i].dma_handle;
|
|
info->screen_base = buf;
|
|
info->device = &pdev->dev;
|
|
info->par = &priv->ch[i];
|
|
}
|
|
|
|
if (error)
|
|
goto err1;
|
|
|
|
error = sh_mobile_lcdc_start(priv);
|
|
if (error) {
|
|
dev_err(&pdev->dev, "unable to start hardware\n");
|
|
goto err1;
|
|
}
|
|
|
|
for (i = 0; i < j; i++) {
|
|
error = register_framebuffer(&priv->ch[i].info);
|
|
if (error < 0)
|
|
goto err1;
|
|
}
|
|
|
|
for (i = 0; i < j; i++) {
|
|
info = &priv->ch[i].info;
|
|
dev_info(info->dev,
|
|
"registered %s/%s as %dx%d %dbpp.\n",
|
|
pdev->name,
|
|
(priv->ch[i].cfg.chan == LCDC_CHAN_MAINLCD) ?
|
|
"mainlcd" : "sublcd",
|
|
(int) priv->ch[i].cfg.lcd_cfg.xres,
|
|
(int) priv->ch[i].cfg.lcd_cfg.yres,
|
|
priv->ch[i].cfg.bpp);
|
|
|
|
/* deferred io mode: disable clock to save power */
|
|
if (info->fbdefio)
|
|
sh_mobile_lcdc_clk_off(priv);
|
|
}
|
|
|
|
return 0;
|
|
err1:
|
|
sh_mobile_lcdc_remove(pdev);
|
|
err0:
|
|
return error;
|
|
}
|
|
|
|
static int sh_mobile_lcdc_remove(struct platform_device *pdev)
|
|
{
|
|
struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
|
|
struct fb_info *info;
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
|
|
if (priv->ch[i].info.dev)
|
|
unregister_framebuffer(&priv->ch[i].info);
|
|
|
|
sh_mobile_lcdc_stop(priv);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
|
|
info = &priv->ch[i].info;
|
|
|
|
if (!info->device)
|
|
continue;
|
|
|
|
dma_free_coherent(&pdev->dev, info->fix.smem_len,
|
|
info->screen_base, priv->ch[i].dma_handle);
|
|
fb_dealloc_cmap(&info->cmap);
|
|
}
|
|
|
|
#ifdef CONFIG_HAVE_CLK
|
|
if (priv->dot_clk)
|
|
clk_put(priv->dot_clk);
|
|
clk_put(priv->clk);
|
|
#endif
|
|
|
|
if (priv->base)
|
|
iounmap(priv->base);
|
|
|
|
if (priv->irq)
|
|
free_irq(priv->irq, priv);
|
|
kfree(priv);
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver sh_mobile_lcdc_driver = {
|
|
.driver = {
|
|
.name = "sh_mobile_lcdc_fb",
|
|
.owner = THIS_MODULE,
|
|
.pm = &sh_mobile_lcdc_dev_pm_ops,
|
|
},
|
|
.probe = sh_mobile_lcdc_probe,
|
|
.remove = sh_mobile_lcdc_remove,
|
|
};
|
|
|
|
static int __init sh_mobile_lcdc_init(void)
|
|
{
|
|
return platform_driver_register(&sh_mobile_lcdc_driver);
|
|
}
|
|
|
|
static void __exit sh_mobile_lcdc_exit(void)
|
|
{
|
|
platform_driver_unregister(&sh_mobile_lcdc_driver);
|
|
}
|
|
|
|
module_init(sh_mobile_lcdc_init);
|
|
module_exit(sh_mobile_lcdc_exit);
|
|
|
|
MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
|
|
MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
|
|
MODULE_LICENSE("GPL v2");
|