151 lines
3.8 KiB
C
151 lines
3.8 KiB
C
/*
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* Setup pointers to hardware dependent routines.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
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*
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*/
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#include <linux/config.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <asm/bootinfo.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/processor.h>
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#include <asm/reboot.h>
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#include <asm/gt64120.h>
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#include <asm/cobalt/cobalt.h>
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extern void cobalt_machine_restart(char *command);
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extern void cobalt_machine_halt(void);
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extern void cobalt_machine_power_off(void);
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int cobalt_board_id;
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static char my_cmdline[CL_SIZE] = {
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"console=ttyS0,115200 "
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#ifdef CONFIG_IP_PNP
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"ip=on "
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#endif
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#ifdef CONFIG_ROOT_NFS
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"root=/dev/nfs "
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#else
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"root=/dev/hda1 "
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#endif
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};
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const char *get_system_type(void)
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{
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return "MIPS Cobalt";
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}
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static void __init cobalt_timer_setup(struct irqaction *irq)
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{
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/* Load timer value for 150 Hz */
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GALILEO_OUTL(500000, GT_TC0_OFS);
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/* Register our timer interrupt */
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setup_irq(COBALT_TIMER_IRQ, irq);
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/* Enable timer ints */
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GALILEO_OUTL((GALILEO_ENTC0 | GALILEO_SELTC0), GT_TC_CONTROL_OFS);
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/* Unmask timer int */
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GALILEO_OUTL(0x100, GT_INTRMASK_OFS);
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}
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extern struct pci_ops gt64111_pci_ops;
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static struct resource cobalt_mem_resource = {
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"GT64111 PCI MEM", GT64111_IO_BASE, 0xffffffffUL, IORESOURCE_MEM
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};
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static struct resource cobalt_io_resource = {
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"GT64111 IO MEM", 0x00001000UL, 0x0fffffffUL, IORESOURCE_IO
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};
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static struct resource cobalt_io_resources[] = {
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{ "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
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{ "timer", 0x40, 0x5f, IORESOURCE_BUSY },
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{ "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
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{ "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
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{ "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
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};
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#define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
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static struct pci_controller cobalt_pci_controller = {
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.pci_ops = >64111_pci_ops,
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.mem_resource = &cobalt_mem_resource,
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.mem_offset = 0,
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.io_resource = &cobalt_io_resource,
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.io_offset = 0x00001000UL - GT64111_IO_BASE
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};
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static void __init cobalt_setup(void)
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{
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unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
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int i;
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_machine_restart = cobalt_machine_restart;
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_machine_halt = cobalt_machine_halt;
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_machine_power_off = cobalt_machine_power_off;
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board_timer_setup = cobalt_timer_setup;
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set_io_port_base(KSEG1ADDR(GT64111_IO_BASE));
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/*
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* This is a prom style console. We just poke at the
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* UART to make it talk.
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* Only use this console if you really screw up and can't
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* get to the stage of setting up a real serial console.
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*/
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/*ns16550_setup_console();*/
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/* request I/O space for devices used on all i[345]86 PCs */
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for (i = 0; i < COBALT_IO_RESOURCES; i++)
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request_resource(&ioport_resource, cobalt_io_resources + i);
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/* Read the cobalt id register out of the PCI config space */
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PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
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cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
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cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
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cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
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#ifdef CONFIG_PCI
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register_pci_controller(&cobalt_pci_controller);
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#endif
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}
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early_initcall(cobalt_setup);
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/*
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* Prom init. We read our one and only communication with the firmware.
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* Grab the amount of installed memory
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*/
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void __init prom_init(void)
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{
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int argc = fw_arg0;
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strcpy(arcs_cmdline, my_cmdline);
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mips_machgroup = MACH_GROUP_COBALT;
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add_memory_region(0x0, argc & 0x7fffffff, BOOT_MEM_RAM);
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}
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unsigned long __init prom_free_prom_memory(void)
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{
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/* Nothing to do! */
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return 0;
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}
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