3581ced3b6
The Pstate transition latency check was added for broken F10h BIOSen which wrongly contain a value of 0 for transition and bus master latency. Fam11h and later, however, (will) have similar transition latency so extend that behavior for them too. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Signed-off-by: Dave Jones <davej@redhat.com> |
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.. | ||
cpufreq | ||
mcheck | ||
mtrr | ||
.gitignore | ||
Makefile | ||
addon_cpuid_features.c | ||
amd.c | ||
bugs.c | ||
bugs_64.c | ||
centaur.c | ||
cmpxchg.c | ||
common.c | ||
cpu.h | ||
cyrix.c | ||
hypervisor.c | ||
intel.c | ||
intel_cacheinfo.c | ||
mkcapflags.pl | ||
mshyperv.c | ||
perf_event.c | ||
perf_event_amd.c | ||
perf_event_intel.c | ||
perf_event_intel_ds.c | ||
perf_event_intel_lbr.c | ||
perf_event_p4.c | ||
perf_event_p6.c | ||
perfctr-watchdog.c | ||
powerflags.c | ||
proc.c | ||
sched.c | ||
transmeta.c | ||
umc.c | ||
vmware.c |