81 lines
2.4 KiB
C
81 lines
2.4 KiB
C
/*
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*
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* Hitachi Big Sur Eval Board support
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*
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* Dustin McIntire (dustin@sensoria.com)
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* Derived from Hitachi SH7751 reference manual
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*
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*/
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#ifndef _ASM_BIGSUR_H_
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#define _ASM_BIGSUR_H_
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#include <asm/irq.h>
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#include <asm/hd64465/hd64465.h>
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/* 7751 Internal IRQ's used by external CPLD controller */
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#define BIGSUR_IRQ_LOW 0
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#define BIGSUR_IRQ_NUM 14 /* External CPLD level 1 IRQs */
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#define BIGSUR_IRQ_HIGH (BIGSUR_IRQ_LOW + BIGSUR_IRQ_NUM)
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#define BIGSUR_2NDLVL_IRQ_LOW (HD64465_IRQ_BASE+HD64465_IRQ_NUM)
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#define BIGSUR_2NDLVL_IRQ_NUM 32 /* Level 2 IRQs = 4 regs * 8 bits */
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#define BIGSUR_2NDLVL_IRQ_HIGH (BIGSUR_2NDLVL_IRQ_LOW + \
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BIGSUR_2NDLVL_IRQ_NUM)
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/* PCI interrupt base number (A_INTA-A_INTD) */
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#define BIGSUR_SH7751_PCI_IRQ_BASE (BIGSUR_2NDLVL_IRQ_LOW+10)
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/* CPLD registers and external chip addresses */
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#define BIGSUR_HD64464_ADDR 0xB2000000
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#define BIGSUR_DGDR 0xB1FFFE00
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#define BIGSUR_BIDR 0xB1FFFD00
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#define BIGSUR_CSLR 0xB1FFFC00
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#define BIGSUR_SW1R 0xB1FFFB00
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#define BIGSUR_DBGR 0xB1FFFA00
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#define BIGSUR_BDTR 0xB1FFF900
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#define BIGSUR_BDRR 0xB1FFF800
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#define BIGSUR_PPR1 0xB1FFF700
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#define BIGSUR_PPR2 0xB1FFF600
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#define BIGSUR_IDE2 0xB1FFF500
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#define BIGSUR_IDE3 0xB1FFF400
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#define BIGSUR_SPCR 0xB1FFF300
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#define BIGSUR_ETHR 0xB1FE0000
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#define BIGSUR_PPDR 0xB1FDFF00
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#define BIGSUR_ICTL 0xB1FDFE00
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#define BIGSUR_ICMD 0xB1FDFD00
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#define BIGSUR_DMA0 0xB1FDFC00
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#define BIGSUR_DMA1 0xB1FDFB00
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#define BIGSUR_IRQ0 0xB1FDFA00
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#define BIGSUR_IRQ1 0xB1FDF900
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#define BIGSUR_IRQ2 0xB1FDF800
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#define BIGSUR_IRQ3 0xB1FDF700
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#define BIGSUR_IMR0 0xB1FDF600
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#define BIGSUR_IMR1 0xB1FDF500
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#define BIGSUR_IMR2 0xB1FDF400
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#define BIGSUR_IMR3 0xB1FDF300
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#define BIGSUR_IRLMR0 0xB1FDF200
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#define BIGSUR_IRLMR1 0xB1FDF100
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#define BIGSUR_V320USC_ADDR 0xB1000000
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#define BIGSUR_HD64465_ADDR 0xB0000000
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#define BIGSUR_INTERNAL_BASE 0xB0000000
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/* SMC ethernet card parameters */
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#define BIGSUR_ETHER_IOPORT 0x220
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/* IDE register paramters */
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#define BIGSUR_IDECMD_IOPORT 0x1f0
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#define BIGSUR_IDECTL_IOPORT 0x1f8
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/* LED bit position in BIGSUR_CSLR */
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#define BIGSUR_LED (1<<4)
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/* PCI: default LOCAL memory window sizes (seen from PCI bus) */
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#define BIGSUR_LSR0_SIZE (64*(1<<20)) //64MB
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#define BIGSUR_LSR1_SIZE (64*(1<<20)) //64MB
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#endif /* _ASM_BIGSUR_H_ */
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