248 lines
7.2 KiB
C
248 lines
7.2 KiB
C
/*
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**********************************************************************
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* hwaccess.h
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* Copyright 1999, 2000 Creative Labs, Inc.
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*
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**********************************************************************
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*
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* Date Author Summary of changes
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* ---- ------ ------------------
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* October 20, 1999 Bertrand Lee base code release
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*
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**********************************************************************
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this program; if not, write to the Free
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* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
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* USA.
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*
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**********************************************************************
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*/
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#ifndef _HWACCESS_H
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#define _HWACCESS_H
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#include <linux/fs.h>
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#include <linux/sound.h>
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#include <linux/soundcard.h>
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#include <linux/ac97_codec.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/sched.h>
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#include <asm/io.h>
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#include "efxmgr.h"
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#include "passthrough.h"
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#include "midi.h"
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#define EMUPAGESIZE 4096 /* don't change */
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#define NUM_G 64 /* use all channels */
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#define NUM_FXSENDS 4 /* don't change */
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/* setting this to other than a power of two may break some applications */
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#define MAXBUFSIZE 65536
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#define MAXPAGES 8192
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#define BUFMAXPAGES (MAXBUFSIZE / PAGE_SIZE)
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#define FLAGS_AVAILABLE 0x0001
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#define FLAGS_READY 0x0002
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struct memhandle
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{
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dma_addr_t dma_handle;
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void *addr;
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u32 size;
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};
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#define DEBUG_LEVEL 2
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#ifdef EMU10K1_DEBUG
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# define DPD(level,x,y...) do {if(level <= DEBUG_LEVEL) printk( KERN_NOTICE "emu10k1: %s: %d: " x , __FILE__ , __LINE__ , y );} while(0)
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# define DPF(level,x) do {if(level <= DEBUG_LEVEL) printk( KERN_NOTICE "emu10k1: %s: %d: " x , __FILE__ , __LINE__ );} while(0)
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#else
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# define DPD(level,x,y...) do { } while (0) /* not debugging: nothing */
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# define DPF(level,x) do { } while (0)
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#endif /* EMU10K1_DEBUG */
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#define ERROR() DPF(1,"error\n")
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/* DATA STRUCTURES */
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struct emu10k1_waveout
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{
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u32 send_routing[3];
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// audigy only:
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u32 send_routing2[3];
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u32 send_dcba[3];
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// audigy only:
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u32 send_hgfe[3];
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};
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#define ROUTE_PCM 0
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#define ROUTE_PT 1
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#define ROUTE_PCM1 2
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#define SEND_MONO 0
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#define SEND_LEFT 1
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#define SEND_RIGHT 2
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struct emu10k1_wavein
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{
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struct wiinst *ac97;
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struct wiinst *mic;
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struct wiinst *fx;
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u8 recsrc;
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u32 fxwc;
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};
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#define CMD_READ 1
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#define CMD_WRITE 2
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struct mixer_private_ioctl {
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u32 cmd;
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u32 val[90];
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};
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/* bogus ioctls numbers to escape from OSS mixer limitations */
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#define CMD_WRITEFN0 _IOW('D', 0, struct mixer_private_ioctl)
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#define CMD_READFN0 _IOR('D', 1, struct mixer_private_ioctl)
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#define CMD_WRITEPTR _IOW('D', 2, struct mixer_private_ioctl)
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#define CMD_READPTR _IOR('D', 3, struct mixer_private_ioctl)
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#define CMD_SETRECSRC _IOW('D', 4, struct mixer_private_ioctl)
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#define CMD_GETRECSRC _IOR('D', 5, struct mixer_private_ioctl)
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#define CMD_GETVOICEPARAM _IOR('D', 6, struct mixer_private_ioctl)
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#define CMD_SETVOICEPARAM _IOW('D', 7, struct mixer_private_ioctl)
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#define CMD_GETPATCH _IOR('D', 8, struct mixer_private_ioctl)
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#define CMD_GETGPR _IOR('D', 9, struct mixer_private_ioctl)
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#define CMD_GETCTLGPR _IOR('D', 10, struct mixer_private_ioctl)
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#define CMD_SETPATCH _IOW('D', 11, struct mixer_private_ioctl)
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#define CMD_SETGPR _IOW('D', 12, struct mixer_private_ioctl)
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#define CMD_SETCTLGPR _IOW('D', 13, struct mixer_private_ioctl)
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#define CMD_SETGPOUT _IOW('D', 14, struct mixer_private_ioctl)
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#define CMD_GETGPR2OSS _IOR('D', 15, struct mixer_private_ioctl)
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#define CMD_SETGPR2OSS _IOW('D', 16, struct mixer_private_ioctl)
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#define CMD_SETMCH_FX _IOW('D', 17, struct mixer_private_ioctl)
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#define CMD_SETPASSTHROUGH _IOW('D', 18, struct mixer_private_ioctl)
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#define CMD_PRIVATE3_VERSION _IOW('D', 19, struct mixer_private_ioctl)
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#define CMD_AC97_BOOST _IOW('D', 20, struct mixer_private_ioctl)
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//up this number when breaking compatibility
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#define PRIVATE3_VERSION 2
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struct emu10k1_card
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{
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struct list_head list;
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struct memhandle virtualpagetable;
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struct memhandle tankmem;
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struct memhandle silentpage;
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spinlock_t lock;
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u8 voicetable[NUM_G];
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u16 emupagetable[MAXPAGES];
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struct list_head timers;
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u16 timer_delay;
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spinlock_t timer_lock;
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struct pci_dev *pci_dev;
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unsigned long iobase;
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unsigned long length;
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unsigned short model;
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unsigned int irq;
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int audio_dev;
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int audio_dev1;
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int midi_dev;
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#ifdef EMU10K1_SEQUENCER
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int seq_dev;
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struct emu10k1_mididevice *seq_mididev;
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#endif
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struct ac97_codec *ac97;
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int ac97_supported_mixers;
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int ac97_stereo_mixers;
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/* Number of first fx voice for multichannel output */
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u8 mchannel_fx;
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struct emu10k1_waveout waveout;
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struct emu10k1_wavein wavein;
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struct emu10k1_mpuout *mpuout;
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struct emu10k1_mpuin *mpuin;
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struct semaphore open_sem;
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mode_t open_mode;
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wait_queue_head_t open_wait;
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u32 mpuacqcount; // Mpu acquire count
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u32 has_toslink; // TOSLink detection
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u8 chiprev; /* Chip revision */
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u8 is_audigy;
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u8 is_aps;
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struct patch_manager mgr;
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struct pt_data pt;
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};
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int emu10k1_addxmgr_alloc(u32, struct emu10k1_card *);
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void emu10k1_addxmgr_free(struct emu10k1_card *, int);
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int emu10k1_find_control_gpr(struct patch_manager *, const char *, const char *);
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void emu10k1_set_control_gpr(struct emu10k1_card *, int , s32, int );
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void emu10k1_set_volume_gpr(struct emu10k1_card *, int, s32, int);
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#define VOL_6BIT 0x40
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#define VOL_5BIT 0x20
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#define VOL_4BIT 0x10
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#define TIMEOUT 16384
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u32 srToPitch(u32);
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extern struct list_head emu10k1_devs;
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/* Hardware Abstraction Layer access functions */
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void emu10k1_writefn0(struct emu10k1_card *, u32, u32);
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void emu10k1_writefn0_2(struct emu10k1_card *, u32, u32, int);
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u32 emu10k1_readfn0(struct emu10k1_card *, u32);
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void emu10k1_timer_set(struct emu10k1_card *, u16);
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void sblive_writeptr(struct emu10k1_card *, u32, u32, u32);
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void sblive_writeptr_tag(struct emu10k1_card *, u32, ...);
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#define TAGLIST_END 0
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u32 sblive_readptr(struct emu10k1_card *, u32 , u32 );
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void emu10k1_irq_enable(struct emu10k1_card *, u32);
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void emu10k1_irq_disable(struct emu10k1_card *, u32);
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void emu10k1_clear_stop_on_loop(struct emu10k1_card *, u32);
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/* AC97 Codec register access function */
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u16 emu10k1_ac97_read(struct ac97_codec *, u8);
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void emu10k1_ac97_write(struct ac97_codec *, u8, u16);
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/* MPU access function*/
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int emu10k1_mpu_write_data(struct emu10k1_card *, u8);
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int emu10k1_mpu_read_data(struct emu10k1_card *, u8 *);
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int emu10k1_mpu_reset(struct emu10k1_card *);
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int emu10k1_mpu_acquire(struct emu10k1_card *);
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int emu10k1_mpu_release(struct emu10k1_card *);
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#endif /* _HWACCESS_H */
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