linux-stable-rt/include/asm-mips/sibyte
Ralf Baechle d04533650f [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.
The BCM148 has 4 cores but there are also just 4 generic timers available
so use the ZBbus cycle counter instead of it.  In addition the ZBbus
counter also offers a much higher resolution and 64-bit counting so I'm
considering a later complete conversion to it once I figure out if all
members of the Sibyte SOC family support it - the docs seem to agree but
the headers files seem to disagree ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
..
bcm1480_int.h
bcm1480_l2c.h
bcm1480_mc.h
bcm1480_regs.h
bcm1480_scd.h
bigsur.h
board.h
carmel.h
sb1250.h
sb1250_defs.h
sb1250_dma.h
sb1250_genbus.h
sb1250_int.h
sb1250_l2c.h
sb1250_ldt.h
sb1250_mac.h
sb1250_mc.h
sb1250_regs.h
sb1250_scd.h
sb1250_smbus.h
sb1250_syncser.h
sb1250_uart.h
sentosa.h
swarm.h