141 lines
3.7 KiB
C
141 lines
3.7 KiB
C
/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/5307/config.c
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*
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* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2000, Lineo (www.lineo.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <asm/irq.h>
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#include <asm/dma.h>
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#include <asm/traps.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcftimer.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfdma.h>
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#include <asm/mcfwdebug.h>
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/***************************************************************************/
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void coldfire_tick(void);
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void coldfire_timer_init(irq_handler_t handler);
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unsigned long coldfire_timer_offset(void);
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void coldfire_reset(void);
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extern unsigned int mcf_timervector;
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extern unsigned int mcf_profilevector;
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extern unsigned int mcf_timerlevel;
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/***************************************************************************/
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/*
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* Some platforms need software versions of the GPIO data registers.
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*/
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unsigned short ppdata;
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unsigned char ledbank = 0xff;
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/***************************************************************************/
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/*
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* DMA channel base address table.
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*/
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unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
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MCF_MBAR + MCFDMA_BASE0,
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MCF_MBAR + MCFDMA_BASE1,
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MCF_MBAR + MCFDMA_BASE2,
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MCF_MBAR + MCFDMA_BASE3,
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};
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unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
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/***************************************************************************/
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void mcf_autovector(unsigned int vec)
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{
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volatile unsigned char *mbar;
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if ((vec >= 25) && (vec <= 31)) {
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mbar = (volatile unsigned char *) MCF_MBAR;
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vec = 0x1 << (vec - 24);
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*(mbar + MCFSIM_AVR) |= vec;
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mcf_setimr(mcf_getimr() & ~vec);
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}
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}
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/***************************************************************************/
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void mcf_settimericr(unsigned int timer, unsigned int level)
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{
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volatile unsigned char *icrp;
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unsigned int icr, imr;
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if (timer <= 2) {
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switch (timer) {
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case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
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default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
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}
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icrp = (volatile unsigned char *) (MCF_MBAR + icr);
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*icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
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mcf_setimr(mcf_getimr() & ~imr);
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}
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}
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/***************************************************************************/
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int mcf_timerirqpending(int timer)
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{
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unsigned int imr = 0;
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switch (timer) {
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case 1: imr = MCFSIM_IMR_TIMER1; break;
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case 2: imr = MCFSIM_IMR_TIMER2; break;
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default: break;
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}
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return (mcf_getipr() & imr);
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}
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/***************************************************************************/
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void config_BSP(char *commandp, int size)
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{
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mcf_setimr(MCFSIM_IMR_MASKALL);
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#if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
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defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
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defined(CONFIG_CLEOPATRA)
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/* Copy command line from FLASH to local buffer... */
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memcpy(commandp, (char *) 0xf0004000, size);
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commandp[size-1] = 0;
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/* Different timer setup - to prevent device clash */
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mcf_timervector = 30;
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mcf_profilevector = 31;
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mcf_timerlevel = 6;
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#endif
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mach_sched_init = coldfire_timer_init;
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mach_tick = coldfire_tick;
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mach_gettimeoffset = coldfire_timer_offset;
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mach_reset = coldfire_reset;
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#ifdef MCF_BDM_DISABLE
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/*
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* Disable the BDM clocking. This also turns off most of the rest of
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* the BDM device. This is good for EMC reasons. This option is not
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* incompatible with the memory protection option.
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*/
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wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
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#endif
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}
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/***************************************************************************/
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