339 lines
7.9 KiB
C
339 lines
7.9 KiB
C
/*
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* KFR2R09 LCD panel support
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*
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* Copyright (C) 2009 Magnus Damm
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*
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* Register settings based on the out-of-tree t33fb.c driver
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* Copyright (C) 2008 Lineo Solutions, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <video/sh_mobile_lcdc.h>
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#include <mach/kfr2r09.h>
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#include <cpu/sh7724.h>
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/* The on-board LCD module is a Hitachi TX07D34VM0AAA. This module is made
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* up of a 240x400 LCD hooked up to a R61517 driver IC. The driver IC is
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* communicating with the main port of the LCDC using an 18-bit SYS interface.
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*
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* The device code for this LCD module is 0x01221517.
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*/
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static const unsigned char data_frame_if[] = {
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0x02, /* WEMODE: 1=cont, 0=one-shot */
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0x00, 0x00,
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0x00, /* EPF, DFM */
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0x02, /* RIM[1] : 1 (18bpp) */
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};
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static const unsigned char data_panel[] = {
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0x0b,
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0x63, /* 400 lines */
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0x04, 0x00, 0x00, 0x04, 0x11, 0x00, 0x00,
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};
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static const unsigned char data_timing[] = {
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0x00, 0x00, 0x13, 0x08, 0x08,
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};
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static const unsigned char data_timing_src[] = {
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0x11, 0x01, 0x00, 0x01,
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};
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static const unsigned char data_gamma[] = {
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0x01, 0x02, 0x08, 0x23, 0x03, 0x0c, 0x00, 0x06, 0x00, 0x00,
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0x01, 0x00, 0x0c, 0x23, 0x03, 0x08, 0x02, 0x06, 0x00, 0x00,
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};
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static const unsigned char data_power[] = {
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0x07, 0xc5, 0xdc, 0x02, 0x33, 0x0a,
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};
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static unsigned long read_reg(void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so)
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{
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return so->read_data(sohandle);
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}
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static void write_reg(void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so,
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int i, unsigned long v)
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{
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if (i)
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so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */
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else
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so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */
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}
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static void write_data(void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so,
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unsigned char const *data, int no_data)
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{
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int i;
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for (i = 0; i < no_data; i++)
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write_reg(sohandle, so, 1, data[i]);
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}
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static unsigned long read_device_code(void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so)
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{
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unsigned long device_code;
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/* access protect OFF */
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write_reg(sohandle, so, 0, 0xb0);
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write_reg(sohandle, so, 1, 0x00);
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/* deep standby OFF */
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write_reg(sohandle, so, 0, 0xb1);
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write_reg(sohandle, so, 1, 0x00);
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/* device code command */
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write_reg(sohandle, so, 0, 0xbf);
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mdelay(50);
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/* dummy read */
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read_reg(sohandle, so);
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/* read device code */
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device_code = ((read_reg(sohandle, so) & 0xff) << 24);
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device_code |= ((read_reg(sohandle, so) & 0xff) << 16);
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device_code |= ((read_reg(sohandle, so) & 0xff) << 8);
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device_code |= (read_reg(sohandle, so) & 0xff);
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return device_code;
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}
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static void write_memory_start(void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so)
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{
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write_reg(sohandle, so, 0, 0x2c);
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}
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static void clear_memory(void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so)
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{
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int i;
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/* write start */
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write_memory_start(sohandle, so);
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/* paint it black */
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for (i = 0; i < (240 * 400); i++)
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write_reg(sohandle, so, 1, 0x00);
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}
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static void display_on(void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so)
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{
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/* access protect off */
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write_reg(sohandle, so, 0, 0xb0);
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write_reg(sohandle, so, 1, 0x00);
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/* exit deep standby mode */
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write_reg(sohandle, so, 0, 0xb1);
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write_reg(sohandle, so, 1, 0x00);
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/* frame memory I/F */
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write_reg(sohandle, so, 0, 0xb3);
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write_data(sohandle, so, data_frame_if, ARRAY_SIZE(data_frame_if));
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/* display mode and frame memory write mode */
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write_reg(sohandle, so, 0, 0xb4);
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write_reg(sohandle, so, 1, 0x00); /* DBI, internal clock */
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/* panel */
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write_reg(sohandle, so, 0, 0xc0);
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write_data(sohandle, so, data_panel, ARRAY_SIZE(data_panel));
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/* timing (normal) */
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write_reg(sohandle, so, 0, 0xc1);
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write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
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/* timing (partial) */
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write_reg(sohandle, so, 0, 0xc2);
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write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
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/* timing (idle) */
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write_reg(sohandle, so, 0, 0xc3);
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write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
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/* timing (source/VCOM/gate driving) */
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write_reg(sohandle, so, 0, 0xc4);
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write_data(sohandle, so, data_timing_src, ARRAY_SIZE(data_timing_src));
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/* gamma (red) */
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write_reg(sohandle, so, 0, 0xc8);
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write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
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/* gamma (green) */
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write_reg(sohandle, so, 0, 0xc9);
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write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
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/* gamma (blue) */
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write_reg(sohandle, so, 0, 0xca);
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write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
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/* power (common) */
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write_reg(sohandle, so, 0, 0xd0);
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write_data(sohandle, so, data_power, ARRAY_SIZE(data_power));
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/* VCOM */
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write_reg(sohandle, so, 0, 0xd1);
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write_reg(sohandle, so, 1, 0x00);
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write_reg(sohandle, so, 1, 0x0f);
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write_reg(sohandle, so, 1, 0x02);
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/* power (normal) */
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write_reg(sohandle, so, 0, 0xd2);
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write_reg(sohandle, so, 1, 0x63);
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write_reg(sohandle, so, 1, 0x24);
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/* power (partial) */
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write_reg(sohandle, so, 0, 0xd3);
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write_reg(sohandle, so, 1, 0x63);
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write_reg(sohandle, so, 1, 0x24);
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/* power (idle) */
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write_reg(sohandle, so, 0, 0xd4);
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write_reg(sohandle, so, 1, 0x63);
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write_reg(sohandle, so, 1, 0x24);
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write_reg(sohandle, so, 0, 0xd8);
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write_reg(sohandle, so, 1, 0x77);
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write_reg(sohandle, so, 1, 0x77);
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/* TE signal */
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write_reg(sohandle, so, 0, 0x35);
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write_reg(sohandle, so, 1, 0x00);
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/* TE signal line */
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write_reg(sohandle, so, 0, 0x44);
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write_reg(sohandle, so, 1, 0x00);
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write_reg(sohandle, so, 1, 0x00);
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/* column address */
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write_reg(sohandle, so, 0, 0x2a);
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write_reg(sohandle, so, 1, 0x00);
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write_reg(sohandle, so, 1, 0x00);
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write_reg(sohandle, so, 1, 0x00);
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write_reg(sohandle, so, 1, 0xef);
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/* page address */
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write_reg(sohandle, so, 0, 0x2b);
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write_reg(sohandle, so, 1, 0x00);
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write_reg(sohandle, so, 1, 0x00);
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write_reg(sohandle, so, 1, 0x01);
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write_reg(sohandle, so, 1, 0x8f);
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/* exit sleep mode */
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write_reg(sohandle, so, 0, 0x11);
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mdelay(120);
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/* clear vram */
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clear_memory(sohandle, so);
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/* display ON */
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write_reg(sohandle, so, 0, 0x29);
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mdelay(1);
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write_memory_start(sohandle, so);
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}
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int kfr2r09_lcd_setup(void *board_data, void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so)
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{
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/* power on */
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gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */
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gpio_set_value(GPIO_PTE4, 0); /* LCD_RST/ -> L */
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gpio_set_value(GPIO_PTF4, 1); /* PROTECT/ -> H */
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udelay(1100);
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gpio_set_value(GPIO_PTE4, 1); /* LCD_RST/ -> H */
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udelay(10);
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gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */
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mdelay(20);
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if (read_device_code(sohandle, so) != 0x01221517)
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return -ENODEV;
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pr_info("KFR2R09 WQVGA LCD Module detected.\n");
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display_on(sohandle, so);
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return 0;
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}
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void kfr2r09_lcd_start(void *board_data, void *sohandle,
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struct sh_mobile_lcdc_sys_bus_ops *so)
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{
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write_memory_start(sohandle, so);
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}
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#define CTRL_CKSW 0x10
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#define CTRL_C10 0x20
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#define CTRL_CPSW 0x80
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#define MAIN_MLED4 0x40
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#define MAIN_MSW 0x80
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static int kfr2r09_lcd_backlight(int on)
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{
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struct i2c_adapter *a;
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struct i2c_msg msg;
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unsigned char buf[2];
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int ret;
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a = i2c_get_adapter(0);
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if (!a)
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return -ENODEV;
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buf[0] = 0x00;
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if (on)
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buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW;
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else
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buf[1] = 0;
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msg.addr = 0x75;
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msg.buf = buf;
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msg.len = 2;
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msg.flags = 0;
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ret = i2c_transfer(a, &msg, 1);
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if (ret != 1)
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return -ENODEV;
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buf[0] = 0x01;
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if (on)
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buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c;
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else
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buf[1] = 0;
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msg.addr = 0x75;
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msg.buf = buf;
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msg.len = 2;
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msg.flags = 0;
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ret = i2c_transfer(a, &msg, 1);
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if (ret != 1)
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return -ENODEV;
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return 0;
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}
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void kfr2r09_lcd_on(void *board_data, struct fb_info *info)
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{
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kfr2r09_lcd_backlight(1);
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}
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void kfr2r09_lcd_off(void *board_data)
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{
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kfr2r09_lcd_backlight(0);
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}
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