56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
#ifndef _ASM_X8664_IOMMU_H
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#define _ASM_X8664_IOMMU_H 1
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extern void pci_iommu_shutdown(void);
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extern void no_iommu_init(void);
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extern int force_iommu, no_iommu;
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extern int iommu_detected;
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extern int agp_amd64_init(void);
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#ifdef CONFIG_GART_IOMMU
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extern void gart_iommu_init(void);
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extern void gart_iommu_shutdown(void);
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extern void __init gart_parse_options(char *);
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extern void early_gart_iommu_check(void);
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extern void gart_iommu_hole_init(void);
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extern int fallback_aper_order;
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extern int fallback_aper_force;
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extern int gart_iommu_aperture;
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extern int gart_iommu_aperture_allowed;
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extern int gart_iommu_aperture_disabled;
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extern int fix_aperture;
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#else
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#define gart_iommu_aperture 0
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#define gart_iommu_aperture_allowed 0
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static inline void early_gart_iommu_check(void)
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{
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}
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static inline void gart_iommu_shutdown(void)
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{
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}
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#endif
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/* PTE bits. */
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#define GPTE_VALID 1
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#define GPTE_COHERENT 2
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/* Aperture control register bits. */
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#define GARTEN (1<<0)
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#define DISGARTCPU (1<<4)
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#define DISGARTIO (1<<5)
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/* GART cache control register bits. */
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#define INVGART (1<<0)
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#define GARTPTEERR (1<<1)
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/* K8 On-cpu GART registers */
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#define AMD64_GARTAPERTURECTL 0x90
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#define AMD64_GARTAPERTUREBASE 0x94
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#define AMD64_GARTTABLEBASE 0x98
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#define AMD64_GARTCACHECTL 0x9c
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#define AMD64_GARTEN (1<<0)
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#endif
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