457 lines
14 KiB
C
457 lines
14 KiB
C
#ifndef ASMARM_DMA_MAPPING_H
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#define ASMARM_DMA_MAPPING_H
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#ifdef __KERNEL__
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#include <linux/mm.h> /* need struct page */
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#include <asm/scatterlist.h>
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/*
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* DMA-consistent mapping functions. These allocate/free a region of
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* uncached, unwrite-buffered mapped memory space for use with DMA
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* devices. This is the "generic" version. The PCI specific version
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* is in pci.h
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*
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* Note: Drivers should NOT use this function directly, as it will break
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* platforms with CONFIG_DMABOUNCE.
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* Use the driver DMA support - see dma-mapping.h (dma_sync_*)
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*/
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extern void consistent_sync(const void *kaddr, size_t size, int rw);
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/*
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* Return whether the given device DMA address mask can be supported
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* properly. For example, if your device can only drive the low 24-bits
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* during bus mastering, then you would pass 0x00ffffff as the mask
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* to this function.
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*
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* FIXME: This should really be a platform specific issue - we should
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* return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
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*/
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static inline int dma_supported(struct device *dev, u64 mask)
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{
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return dev->dma_mask && *dev->dma_mask != 0;
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}
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static inline int dma_set_mask(struct device *dev, u64 dma_mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, dma_mask))
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return -EIO;
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*dev->dma_mask = dma_mask;
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return 0;
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}
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static inline int dma_get_cache_alignment(void)
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{
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return 32;
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}
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static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
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{
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return !!arch_is_coherent();
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}
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/*
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* DMA errors are defined by all-bits-set in the DMA address.
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*/
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static inline int dma_mapping_error(dma_addr_t dma_addr)
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{
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return dma_addr == ~0;
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}
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/*
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* Dummy noncoherent implementation. We don't provide a dma_cache_sync
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* function so drivers using this API are highlighted with build warnings.
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*/
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static inline void *
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dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
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{
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return NULL;
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}
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static inline void
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dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t handle)
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{
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}
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/**
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* dma_alloc_coherent - allocate consistent memory for DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: required memory size
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* @handle: bus-specific DMA address
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*
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* Allocate some uncached, unbuffered memory for a device for
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* performing DMA. This function allocates pages, and will
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* return the CPU-viewed address, and sets @handle to be the
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* device-viewed address.
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*/
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extern void *
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dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
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/**
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* dma_free_coherent - free memory allocated by dma_alloc_coherent
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: size of memory originally requested in dma_alloc_coherent
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* @cpu_addr: CPU-view address returned from dma_alloc_coherent
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* @handle: device-view address returned from dma_alloc_coherent
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*
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* Free (and unmap) a DMA buffer previously allocated by
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* dma_alloc_coherent().
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*
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* References to memory and mappings associated with cpu_addr/handle
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* during and after this call executing are illegal.
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*/
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extern void
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dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t handle);
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/**
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* dma_mmap_coherent - map a coherent DMA allocation into user space
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @vma: vm_area_struct describing requested user mapping
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* @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
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* @handle: device-view address returned from dma_alloc_coherent
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* @size: size of memory originally requested in dma_alloc_coherent
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*
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* Map a coherent DMA buffer previously allocated by dma_alloc_coherent
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* into user space. The coherent DMA buffer must not be freed by the
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* driver until the user space mapping has been released.
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*/
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int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t handle, size_t size);
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/**
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* dma_alloc_writecombine - allocate writecombining memory for DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: required memory size
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* @handle: bus-specific DMA address
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*
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* Allocate some uncached, buffered memory for a device for
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* performing DMA. This function allocates pages, and will
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* return the CPU-viewed address, and sets @handle to be the
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* device-viewed address.
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*/
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extern void *
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dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
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#define dma_free_writecombine(dev,size,cpu_addr,handle) \
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dma_free_coherent(dev,size,cpu_addr,handle)
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int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t handle, size_t size);
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/**
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* dma_map_single - map a single buffer for streaming DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @cpu_addr: CPU direct mapped address of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Ensure that any data held in the cache is appropriately discarded
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* or written back.
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*
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* The device owns this memory once this call has completed. The CPU
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* can regain ownership by calling dma_unmap_single() or
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* dma_sync_single_for_cpu().
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*/
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#ifndef CONFIG_DMABOUNCE
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static inline dma_addr_t
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dma_map_single(struct device *dev, void *cpu_addr, size_t size,
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enum dma_data_direction dir)
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{
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if (!arch_is_coherent())
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consistent_sync(cpu_addr, size, dir);
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return virt_to_dma(dev, (unsigned long)cpu_addr);
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}
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#else
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extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
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#endif
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/**
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* dma_map_page - map a portion of a page for streaming DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @page: page that buffer resides in
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* @offset: offset into page for start of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Ensure that any data held in the cache is appropriately discarded
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* or written back.
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*
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* The device owns this memory once this call has completed. The CPU
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* can regain ownership by calling dma_unmap_page() or
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* dma_sync_single_for_cpu().
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*/
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static inline dma_addr_t
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dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir)
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{
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return dma_map_single(dev, page_address(page) + offset, size, (int)dir);
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}
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/**
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* dma_unmap_single - unmap a single buffer previously mapped
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @handle: DMA address of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Unmap a single streaming mode DMA translation. The handle and size
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* must match what was provided in the previous dma_map_single() call.
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* All other usages are undefined.
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*
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* After this call, reads by the CPU to the buffer are guaranteed to see
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* whatever the device wrote there.
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*/
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#ifndef CONFIG_DMABOUNCE
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static inline void
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dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
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enum dma_data_direction dir)
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{
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/* nothing to do */
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}
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#else
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extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
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#endif
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/**
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* dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @handle: DMA address of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Unmap a single streaming mode DMA translation. The handle and size
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* must match what was provided in the previous dma_map_single() call.
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* All other usages are undefined.
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*
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* After this call, reads by the CPU to the buffer are guaranteed to see
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* whatever the device wrote there.
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*/
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static inline void
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dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
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enum dma_data_direction dir)
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{
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dma_unmap_single(dev, handle, size, (int)dir);
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}
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/**
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* dma_map_sg - map a set of SG buffers for streaming mode DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Map a set of buffers described by scatterlist in streaming
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* mode for DMA. This is the scatter-gather version of the
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* above dma_map_single interface. Here the scatter gather list
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* elements are each tagged with the appropriate dma address
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* and length. They are obtained via sg_dma_{address,length}(SG).
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*
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* NOTE: An implementation may be able to use a smaller number of
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* DMA address/length pairs than there are SG table elements.
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* (for example via virtual mapping capabilities)
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* The routine returns the number of addr/length pairs actually
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* used, at most nents.
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*
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* Device ownership issues as mentioned above for dma_map_single are
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* the same here.
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*/
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#ifndef CONFIG_DMABOUNCE
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static inline int
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dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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char *virt;
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sg->dma_address = page_to_dma(dev, sg->page) + sg->offset;
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virt = page_address(sg->page) + sg->offset;
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if (!arch_is_coherent())
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consistent_sync(virt, sg->length, dir);
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}
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return nents;
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}
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#else
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extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
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#endif
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/**
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* dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Unmap a set of streaming mode DMA translations.
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* Again, CPU read rules concerning calls here are the same as for
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* dma_unmap_single() above.
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*/
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#ifndef CONFIG_DMABOUNCE
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static inline void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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/* nothing to do */
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}
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#else
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extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
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#endif
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/**
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* dma_sync_single_for_cpu
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @handle: DMA address of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Make physical memory consistent for a single streaming mode DMA
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* translation after a transfer.
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*
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* If you perform a dma_map_single() but wish to interrogate the
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* buffer using the cpu, yet do not wish to teardown the PCI dma
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* mapping, you must call this function before doing so. At the
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* next point you give the PCI dma address back to the card, you
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* must first the perform a dma_sync_for_device, and then the
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* device again owns the buffer.
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*/
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#ifndef CONFIG_DMABOUNCE
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static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
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enum dma_data_direction dir)
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{
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if (!arch_is_coherent())
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consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
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enum dma_data_direction dir)
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{
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if (!arch_is_coherent())
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consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
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}
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#else
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extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction);
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extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction);
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#endif
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/**
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* dma_sync_sg_for_cpu
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Make physical memory consistent for a set of streaming
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* mode DMA translations after a transfer.
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*
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* The same as dma_sync_single_for_* but for a scatter-gather list,
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* same rules and usage.
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*/
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#ifndef CONFIG_DMABOUNCE
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static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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char *virt = page_address(sg->page) + sg->offset;
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if (!arch_is_coherent())
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consistent_sync(virt, sg->length, dir);
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}
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}
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static inline void
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dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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int i;
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for (i = 0; i < nents; i++, sg++) {
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char *virt = page_address(sg->page) + sg->offset;
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if (!arch_is_coherent())
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consistent_sync(virt, sg->length, dir);
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}
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}
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#else
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extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
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extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
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#endif
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#ifdef CONFIG_DMABOUNCE
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/*
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* For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
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* and utilize bounce buffers as needed to work around limited DMA windows.
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*
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* On the SA-1111, a bug limits DMA to only certain regions of RAM.
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* On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
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* On some ADI engineering sytems, PCI inbound window is 32MB (12MB total RAM)
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*
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* The following are helper functions used by the dmabounce subystem
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*
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*/
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/**
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* dmabounce_register_dev
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*
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* @dev: valid struct device pointer
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* @small_buf_size: size of buffers to use with small buffer pool
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* @large_buf_size: size of buffers to use with large buffer pool (can be 0)
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*
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* This function should be called by low-level platform code to register
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* a device as requireing DMA buffer bouncing. The function will allocate
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* appropriate DMA pools for the device.
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*
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*/
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extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
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/**
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* dmabounce_unregister_dev
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*
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* @dev: valid struct device pointer
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*
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* This function should be called by low-level platform code when device
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* that was previously registered with dmabounce_register_dev is removed
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* from the system.
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*
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*/
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extern void dmabounce_unregister_dev(struct device *);
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/**
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* dma_needs_bounce
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*
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* @dev: valid struct device pointer
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* @dma_handle: dma_handle of unbounced buffer
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* @size: size of region being mapped
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*
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* Platforms that utilize the dmabounce mechanism must implement
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* this function.
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*
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* The dmabounce routines call this function whenever a dma-mapping
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* is requested to determine whether a given buffer needs to be bounced
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* or not. The function must return 0 if the buffer is OK for
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* DMA access and 1 if the buffer needs to be bounced.
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*
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*/
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extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
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#endif /* CONFIG_DMABOUNCE */
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#endif /* __KERNEL__ */
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#endif
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