445 lines
9.9 KiB
C
445 lines
9.9 KiB
C
/****************************************************************************/
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/*
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* linux/include/asm-m68knommu/ide.h
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*
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* Copyright (C) 1994-1996 Linus Torvalds & authors
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* Copyright (C) 2001 Lineo Inc., davidm@uclinux.org
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*/
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/****************************************************************************/
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#ifndef _M68KNOMMU_IDE_H
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#define _M68KNOMMU_IDE_H
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#ifdef __KERNEL__
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/****************************************************************************/
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#include <linux/config.h>
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#include <linux/interrupt.h>
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#include <asm/setup.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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/****************************************************************************/
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/*
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* some coldfire specifics
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*/
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#ifdef CONFIG_COLDFIRE
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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/*
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* Save some space, only have 1 interface
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*/
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#define MAX_HWIFS 1 /* we only have one interface for now */
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#ifdef CONFIG_SECUREEDGEMP3
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#define MCFSIM_LOCALCS MCFSIM_CSCR4
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#else
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#define MCFSIM_LOCALCS MCFSIM_CSCR6
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#endif
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#endif /* CONFIG_COLDFIRE */
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/****************************************************************************/
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/*
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* Fix up things that may not have been provided
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*/
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#ifndef MAX_HWIFS
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#define MAX_HWIFS 4 /* same as the other archs */
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#endif
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#undef SUPPORT_SLOW_DATA_PORTS
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#define SUPPORT_SLOW_DATA_PORTS 0
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#undef SUPPORT_VLB_SYNC
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#define SUPPORT_VLB_SYNC 0
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/* this definition is used only on startup .. */
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#undef HD_DATA
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#define HD_DATA NULL
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#define DBGIDE(fmt,a...)
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// #define DBGIDE(fmt,a...) printk(fmt, ##a)
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#define IDE_INLINE __inline__
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// #define IDE_INLINE
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/****************************************************************************/
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typedef union {
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unsigned all : 8; /* all of the bits together */
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struct {
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unsigned bit7 : 1; /* always 1 */
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unsigned lba : 1; /* using LBA instead of CHS */
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unsigned bit5 : 1; /* always 1 */
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unsigned unit : 1; /* drive select number, 0 or 1 */
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unsigned head : 4; /* always zeros here */
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} b;
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} select_t;
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/*
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* our list of ports/irq's for different boards
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*/
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static struct m68k_ide_defaults {
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ide_ioreg_t base;
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int irq;
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} m68k_ide_defaults[MAX_HWIFS] = {
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#if defined(CONFIG_SECUREEDGEMP3)
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{ ((ide_ioreg_t)0x30800000), 29 },
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#elif defined(CONFIG_eLIA)
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{ ((ide_ioreg_t)0x30c00000), 29 },
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#else
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{ ((ide_ioreg_t)0x0), 0 }
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#endif
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};
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/****************************************************************************/
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static IDE_INLINE int ide_default_irq(ide_ioreg_t base)
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{
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int i;
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for (i = 0; i < MAX_HWIFS; i++)
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if (m68k_ide_defaults[i].base == base)
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return(m68k_ide_defaults[i].irq);
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return 0;
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}
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static IDE_INLINE ide_ioreg_t ide_default_io_base(int index)
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{
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if (index >= 0 && index < MAX_HWIFS)
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return(m68k_ide_defaults[index].base);
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return 0;
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}
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/*
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* Set up a hw structure for a specified data port, control port and IRQ.
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* This should follow whatever the default interface uses.
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*/
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static IDE_INLINE void ide_init_hwif_ports(
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hw_regs_t *hw,
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ide_ioreg_t data_port,
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ide_ioreg_t ctrl_port,
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int *irq)
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{
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ide_ioreg_t reg = data_port;
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int i;
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for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
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hw->io_ports[i] = reg;
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reg += 1;
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}
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if (ctrl_port) {
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hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
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} else {
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hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0xe;
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}
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}
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#define ide_init_default_irq(base) ide_default_irq(base)
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static IDE_INLINE int
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ide_request_irq(
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unsigned int irq,
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void (*handler)(int, void *, struct pt_regs *),
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unsigned long flags,
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const char *device,
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void *dev_id)
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{
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#ifdef CONFIG_COLDFIRE
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mcf_autovector(irq);
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#endif
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return(request_irq(irq, handler, flags, device, dev_id));
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}
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static IDE_INLINE void
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ide_free_irq(unsigned int irq, void *dev_id)
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{
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free_irq(irq, dev_id);
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}
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static IDE_INLINE int
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ide_check_region(ide_ioreg_t from, unsigned int extent)
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{
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return 0;
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}
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static IDE_INLINE void
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ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name)
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{
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}
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static IDE_INLINE void
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ide_release_region(ide_ioreg_t from, unsigned int extent)
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{
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}
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static IDE_INLINE void
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ide_fix_driveid(struct hd_driveid *id)
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{
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#ifdef CONFIG_COLDFIRE
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int i, n;
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unsigned short *wp = (unsigned short *) id;
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int avoid[] = {49, 51, 52, 59, -1 }; /* do not swap these words */
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/* Need to byte swap shorts, but not char fields */
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for (i = n = 0; i < sizeof(*id) / sizeof(*wp); i++, wp++) {
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if (avoid[n] == i) {
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n++;
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continue;
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}
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*wp = ((*wp & 0xff) << 8) | ((*wp >> 8) & 0xff);
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}
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/* have to word swap the one 32 bit field */
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id->lba_capacity = ((id->lba_capacity & 0xffff) << 16) |
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((id->lba_capacity >> 16) & 0xffff);
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#endif
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}
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static IDE_INLINE void
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ide_release_lock (int *ide_lock)
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{
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}
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static IDE_INLINE void
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ide_get_lock(
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int *ide_lock,
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void (*handler)(int, void *, struct pt_regs *),
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void *data)
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{
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}
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#define ide_ack_intr(hwif) \
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((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
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#define ide__sti() __sti()
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/****************************************************************************/
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/*
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* System specific IO requirements
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*/
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#ifdef CONFIG_COLDFIRE
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#ifdef CONFIG_SECUREEDGEMP3
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/* Replace standard IO functions for funky mapping of MP3 board */
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#undef outb
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#undef outb_p
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#undef inb
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#undef inb_p
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#define outb(v, a) ide_outb(v, (unsigned long) (a))
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#define outb_p(v, a) ide_outb(v, (unsigned long) (a))
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#define inb(a) ide_inb((unsigned long) (a))
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#define inb_p(a) ide_inb((unsigned long) (a))
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#define ADDR8_PTR(addr) (((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr))
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#define ADDR16_PTR(addr) (addr)
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#define ADDR32_PTR(addr) (addr)
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#define SWAP8(w) ((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8))
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#define SWAP16(w) (w)
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#define SWAP32(w) (w)
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static IDE_INLINE void
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ide_outb(unsigned int val, unsigned int addr)
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{
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volatile unsigned short *rp;
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DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
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rp = (volatile unsigned short *) ADDR8_PTR(addr);
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*rp = SWAP8(val);
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}
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static IDE_INLINE int
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ide_inb(unsigned int addr)
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{
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volatile unsigned short *rp, val;
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DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
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rp = (volatile unsigned short *) ADDR8_PTR(addr);
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val = *rp;
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return(SWAP8(val));
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}
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static IDE_INLINE void
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ide_outw(unsigned int val, unsigned int addr)
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{
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volatile unsigned short *rp;
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DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
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rp = (volatile unsigned short *) ADDR16_PTR(addr);
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*rp = SWAP16(val);
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}
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static IDE_INLINE void
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ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
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{
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volatile unsigned short *rp, val;
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unsigned short *buf;
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DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
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buf = (unsigned short *) vbuf;
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rp = (volatile unsigned short *) ADDR16_PTR(addr);
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for (; (len > 0); len--) {
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val = *buf++;
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*rp = SWAP16(val);
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}
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}
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static IDE_INLINE int
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ide_inw(unsigned int addr)
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{
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volatile unsigned short *rp, val;
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DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
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rp = (volatile unsigned short *) ADDR16_PTR(addr);
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val = *rp;
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return(SWAP16(val));
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}
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static IDE_INLINE void
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ide_insw(unsigned int addr, void *vbuf, unsigned long len)
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{
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volatile unsigned short *rp;
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unsigned short w, *buf;
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DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
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buf = (unsigned short *) vbuf;
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rp = (volatile unsigned short *) ADDR16_PTR(addr);
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for (; (len > 0); len--) {
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w = *rp;
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*buf++ = SWAP16(w);
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}
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}
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static IDE_INLINE void
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ide_insl(unsigned int addr, void *vbuf, unsigned long len)
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{
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volatile unsigned long *rp;
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unsigned long w, *buf;
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DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
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buf = (unsigned long *) vbuf;
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rp = (volatile unsigned long *) ADDR32_PTR(addr);
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for (; (len > 0); len--) {
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w = *rp;
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*buf++ = SWAP32(w);
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}
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}
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static IDE_INLINE void
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ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
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{
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volatile unsigned long *rp, val;
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unsigned long *buf;
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DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
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buf = (unsigned long *) vbuf;
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rp = (volatile unsigned long *) ADDR32_PTR(addr);
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for (; (len > 0); len--) {
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val = *buf++;
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*rp = SWAP32(val);
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}
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}
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#elif CONFIG_eLIA
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/* 8/16 bit acesses are controlled by flicking bits in the CS register */
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#define ACCESS_MODE_16BIT() \
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*((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080
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#define ACCESS_MODE_8BIT() \
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*((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040
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static IDE_INLINE void
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ide_outw(unsigned int val, unsigned int addr)
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{
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ACCESS_MODE_16BIT();
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outw(val, addr);
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ACCESS_MODE_8BIT();
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}
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static IDE_INLINE void
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ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
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{
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ACCESS_MODE_16BIT();
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outsw(addr, vbuf, len);
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ACCESS_MODE_8BIT();
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}
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static IDE_INLINE int
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ide_inw(unsigned int addr)
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{
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int ret;
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ACCESS_MODE_16BIT();
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ret = inw(addr);
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ACCESS_MODE_8BIT();
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return(ret);
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}
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static IDE_INLINE void
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ide_insw(unsigned int addr, void *vbuf, unsigned long len)
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{
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ACCESS_MODE_16BIT();
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insw(addr, vbuf, len);
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ACCESS_MODE_8BIT();
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}
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static IDE_INLINE void
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ide_insl(unsigned int addr, void *vbuf, unsigned long len)
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{
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ACCESS_MODE_16BIT();
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insl(addr, vbuf, len);
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ACCESS_MODE_8BIT();
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}
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static IDE_INLINE void
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ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
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{
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ACCESS_MODE_16BIT();
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outsl(addr, vbuf, len);
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ACCESS_MODE_8BIT();
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}
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#endif /* CONFIG_SECUREEDGEMP3 */
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#undef outw
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#undef outw_p
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#undef outsw
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#undef inw
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#undef inw_p
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#undef insw
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#undef insl
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#undef outsl
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#define outw(v, a) ide_outw(v, (unsigned long) (a))
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#define outw_p(v, a) ide_outw(v, (unsigned long) (a))
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#define outsw(a, b, n) ide_outsw((unsigned long) (a), b, n)
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#define inw(a) ide_inw((unsigned long) (a))
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#define inw_p(a) ide_inw((unsigned long) (a))
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#define insw(a, b, n) ide_insw((unsigned long) (a), b, n)
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#define insl(a, b, n) ide_insl((unsigned long) (a), b, n)
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#define outsl(a, b, n) ide_outsl((unsigned long) (a), b, n)
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#endif CONFIG_COLDFIRE
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/****************************************************************************/
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#endif /* __KERNEL__ */
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#endif /* _M68KNOMMU_IDE_H */
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/****************************************************************************/
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