d34d7ae266
Fix the PCIGART increment and add a cpu_to_le32 for ppc (untested) Paulus was unsure if we need to cpu_to_le32 but the old code was definitely wrong, so make it consistent and let the PPC guys figure it out later. Signed-off-by: Dave Airlie <airlied@linux.ie> Cc: Paul Mackerras <paulus@samba.org> Cc: Dave Jones <davej@codemonkey.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org> |
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|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| README.drm | ||
| ati_pcigart.c | ||
| drm.h | ||
| drmP.h | ||
| drm_agpsupport.c | ||
| drm_auth.c | ||
| drm_bufs.c | ||
| drm_context.c | ||
| drm_core.h | ||
| drm_dma.c | ||
| drm_drawable.c | ||
| drm_drv.c | ||
| drm_fops.c | ||
| drm_init.c | ||
| drm_ioc32.c | ||
| drm_ioctl.c | ||
| drm_irq.c | ||
| drm_lock.c | ||
| drm_memory.c | ||
| drm_memory.h | ||
| drm_memory_debug.h | ||
| drm_os_linux.h | ||
| drm_pci.c | ||
| drm_pciids.h | ||
| drm_proc.c | ||
| drm_sarea.h | ||
| drm_scatter.c | ||
| drm_stub.c | ||
| drm_sysfs.c | ||
| drm_vm.c | ||
| ffb_context.c | ||
| ffb_drv.c | ||
| ffb_drv.h | ||
| i810_dma.c | ||
| i810_drm.h | ||
| i810_drv.c | ||
| i810_drv.h | ||
| i830_dma.c | ||
| i830_drm.h | ||
| i830_drv.c | ||
| i830_drv.h | ||
| i830_irq.c | ||
| i915_dma.c | ||
| i915_drm.h | ||
| i915_drv.c | ||
| i915_drv.h | ||
| i915_ioc32.c | ||
| i915_irq.c | ||
| i915_mem.c | ||
| mga_dma.c | ||
| mga_drm.h | ||
| mga_drv.c | ||
| mga_drv.h | ||
| mga_ioc32.c | ||
| mga_irq.c | ||
| mga_state.c | ||
| mga_ucode.h | ||
| mga_warp.c | ||
| r128_cce.c | ||
| r128_drm.h | ||
| r128_drv.c | ||
| r128_drv.h | ||
| r128_ioc32.c | ||
| r128_irq.c | ||
| r128_state.c | ||
| r300_cmdbuf.c | ||
| r300_reg.h | ||
| radeon_cp.c | ||
| radeon_drm.h | ||
| radeon_drv.c | ||
| radeon_drv.h | ||
| radeon_ioc32.c | ||
| radeon_irq.c | ||
| radeon_mem.c | ||
| radeon_state.c | ||
| savage_bci.c | ||
| savage_drm.h | ||
| savage_drv.c | ||
| savage_drv.h | ||
| savage_state.c | ||
| sis_drm.h | ||
| sis_drv.c | ||
| sis_drv.h | ||
| sis_ds.c | ||
| sis_ds.h | ||
| sis_mm.c | ||
| tdfx_drv.c | ||
| tdfx_drv.h | ||
| via_3d_reg.h | ||
| via_dma.c | ||
| via_drm.h | ||
| via_drv.c | ||
| via_drv.h | ||
| via_ds.c | ||
| via_ds.h | ||
| via_irq.c | ||
| via_map.c | ||
| via_mm.c | ||
| via_mm.h | ||
| via_verifier.c | ||
| via_verifier.h | ||
| via_video.c | ||
README.drm
************************************************************
* For the very latest on DRI development, please see: *
* http://dri.sourceforge.net/ *
************************************************************
The Direct Rendering Manager (drm) is a device-independent kernel-level
device driver that provides support for the XFree86 Direct Rendering
Infrastructure (DRI).
The DRM supports the Direct Rendering Infrastructure (DRI) in four major
ways:
1. The DRM provides synchronized access to the graphics hardware via
the use of an optimized two-tiered lock.
2. The DRM enforces the DRI security policy for access to the graphics
hardware by only allowing authenticated X11 clients access to
restricted regions of memory.
3. The DRM provides a generic DMA engine, complete with multiple
queues and the ability to detect the need for an OpenGL context
switch.
4. The DRM is extensible via the use of small device-specific modules
that rely extensively on the API exported by the DRM module.
Documentation on the DRI is available from:
http://precisioninsight.com/piinsights.html
For specific information about kernel-level support, see:
The Direct Rendering Manager, Kernel Support for the Direct Rendering
Infrastructure
http://precisioninsight.com/dr/drm.html
Hardware Locking for the Direct Rendering Infrastructure
http://precisioninsight.com/dr/locking.html
A Security Analysis of the Direct Rendering Infrastructure
http://precisioninsight.com/dr/security.html
************************************************************
* For the very latest on DRI development, please see: *
* http://dri.sourceforge.net/ *
************************************************************