Andrew Isaacson a4b5bd9abc SB1 cache exception handling. ... Expand SB1 cache error handling by adding SB1_CEX_ALWAYS_FATAL and SB1_CEX_STALL, allowing configurable behavior on cache errors. Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2005-10-29 19:32:48 +01:00
..
Makefile	Fixup a few lose ends in explicit support for MIPS R1/R2.	2005-10-29 19:32:37 +01:00
c-r3k.c	Cleanup the mess in cpu_cache_init.	2005-10-29 19:32:32 +01:00
c-r4k.c	Rename page argument of flush_cache_page to something more descriptive.	2005-10-29 19:32:42 +01:00
c-sb1.c	Don't copy SB1 cache error handler to uncached memory.	2005-10-29 19:32:34 +01:00
c-tx39.c	Cleanup the mess in cpu_cache_init.	2005-10-29 19:32:32 +01:00
cache.c	Fix zero length sys_cacheflush	2005-10-29 19:32:44 +01:00
cerr-sb1.c	SB1 cache exception handling.	2005-10-29 19:32:48 +01:00
cex-gen.S	…
cex-sb1.S	SB1 cache exception handling.	2005-10-29 19:32:48 +01:00
dma-coherent.c	Arrested for multiple offences of header file inclusion.	2005-10-29 19:31:07 +01:00
dma-ip27.c	…
dma-ip32.c	…
dma-noncoherent.c	Don't set up a sg dma address if we have no page address for some reason.	2005-10-29 19:32:17 +01:00
extable.c	…
fault.c	Sparseify MIPS.	2005-10-29 19:30:50 +01:00
highmem.c	Define kmap_atomic_pfn() for MIPS.	2005-10-29 19:31:42 +01:00
init.c	Fix wrong comment.	2005-10-29 19:32:38 +01:00
ioremap.c	Inline ioremap() calls for constant addresses that map to KSEG1.	2005-10-29 19:31:34 +01:00
pg-r4k.c	Add/Fix missing bit of R4600 hit cacheop workaround.	2005-10-29 19:32:18 +01:00
pg-sb1.c	Remove useless casts. Fix formatting.	2005-10-29 19:31:00 +01:00
pgtable-32.c	…
pgtable-64.c	…
pgtable.c	…
sc-ip22.c	…
sc-r5k.c	…
sc-rm7k.c	Use macros for the RM7k cp0.config bits instead of magic numbers.	2005-10-29 19:31:28 +01:00
tlb-andes.c	…
tlb-r3k.c	…
tlb-r4k.c	Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.	2005-10-29 19:31:37 +01:00
tlb-r8k.c	…
tlbex-fault.S	…
tlbex.c	Add support for SB1A CPU.	2005-10-29 19:32:46 +01:00