411 lines
10 KiB
C
411 lines
10 KiB
C
/*
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* Copyright © 2007 David Airlie
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* David Airlie
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*/
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/*
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* Modularization
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*/
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#include <linux/module.h>
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#include <linux/fb.h>
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#include "drmP.h"
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#include "drm.h"
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#include "drm_crtc.h"
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#include "drm_crtc_helper.h"
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#include "radeon_drm.h"
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#include "radeon.h"
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#include "drm_fb_helper.h"
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struct radeon_fb_device {
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struct drm_fb_helper helper;
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struct radeon_framebuffer *rfb;
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struct radeon_device *rdev;
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};
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static int radeon_fb_check_var(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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int ret;
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ret = drm_fb_helper_check_var(var, info);
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if (ret)
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return ret;
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/* big endian override for radeon endian workaround */
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#ifdef __BIG_ENDIAN
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{
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int depth;
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switch (var->bits_per_pixel) {
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case 16:
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depth = (var->green.length == 6) ? 16 : 15;
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break;
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case 32:
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depth = (var->transp.length > 0) ? 32 : 24;
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break;
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default:
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depth = var->bits_per_pixel;
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break;
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}
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switch (depth) {
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case 8:
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var->red.offset = 0;
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var->green.offset = 0;
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var->blue.offset = 0;
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var->red.length = 8;
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var->green.length = 8;
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var->blue.length = 8;
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var->transp.length = 0;
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var->transp.offset = 0;
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break;
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case 24:
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var->red.offset = 8;
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var->green.offset = 16;
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var->blue.offset = 24;
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var->red.length = 8;
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var->green.length = 8;
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var->blue.length = 8;
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var->transp.length = 0;
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var->transp.offset = 0;
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break;
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case 32:
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var->red.offset = 8;
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var->green.offset = 16;
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var->blue.offset = 24;
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var->red.length = 8;
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var->green.length = 8;
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var->blue.length = 8;
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var->transp.length = 8;
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var->transp.offset = 0;
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break;
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default:
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return -EINVAL;
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}
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}
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#endif
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return 0;
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}
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static struct fb_ops radeonfb_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = radeon_fb_check_var,
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.fb_set_par = drm_fb_helper_set_par,
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.fb_setcolreg = drm_fb_helper_setcolreg,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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.fb_pan_display = drm_fb_helper_pan_display,
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.fb_blank = drm_fb_helper_blank,
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};
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/**
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* Curretly it is assumed that the old framebuffer is reused.
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*
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* LOCKING
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* caller should hold the mode config lock.
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*
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*/
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int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
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{
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struct fb_info *info;
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struct drm_framebuffer *fb;
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struct drm_display_mode *mode = crtc->desired_mode;
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fb = crtc->fb;
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if (fb == NULL) {
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return 1;
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}
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info = fb->fbdev;
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if (info == NULL) {
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return 1;
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}
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if (mode == NULL) {
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return 1;
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}
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info->var.xres = mode->hdisplay;
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info->var.right_margin = mode->hsync_start - mode->hdisplay;
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info->var.hsync_len = mode->hsync_end - mode->hsync_start;
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info->var.left_margin = mode->htotal - mode->hsync_end;
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info->var.yres = mode->vdisplay;
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info->var.lower_margin = mode->vsync_start - mode->vdisplay;
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info->var.vsync_len = mode->vsync_end - mode->vsync_start;
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info->var.upper_margin = mode->vtotal - mode->vsync_end;
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info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100;
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/* avoid overflow */
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info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh;
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return 0;
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}
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EXPORT_SYMBOL(radeonfb_resize);
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static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
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{
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int aligned = width;
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int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
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int pitch_mask = 0;
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switch (bpp / 8) {
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case 1:
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pitch_mask = align_large ? 255 : 127;
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break;
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case 2:
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pitch_mask = align_large ? 127 : 31;
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break;
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case 3:
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case 4:
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pitch_mask = align_large ? 63 : 15;
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break;
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}
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aligned += pitch_mask;
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aligned &= ~pitch_mask;
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return aligned;
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}
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static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
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.gamma_set = radeon_crtc_fb_gamma_set,
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};
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int radeonfb_create(struct drm_device *dev,
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uint32_t fb_width, uint32_t fb_height,
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uint32_t surface_width, uint32_t surface_height,
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struct drm_framebuffer **fb_p)
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{
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struct radeon_device *rdev = dev->dev_private;
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struct fb_info *info;
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struct radeon_fb_device *rfbdev;
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struct drm_framebuffer *fb = NULL;
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struct radeon_framebuffer *rfb;
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struct drm_mode_fb_cmd mode_cmd;
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struct drm_gem_object *gobj = NULL;
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struct radeon_object *robj = NULL;
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struct device *device = &rdev->pdev->dev;
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int size, aligned_size, ret;
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u64 fb_gpuaddr;
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void *fbptr = NULL;
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unsigned long tmp;
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bool fb_tiled = false; /* useful for testing */
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mode_cmd.width = surface_width;
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mode_cmd.height = surface_height;
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mode_cmd.bpp = 32;
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/* need to align pitch with crtc limits */
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mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8);
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mode_cmd.depth = 24;
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size = mode_cmd.pitch * mode_cmd.height;
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aligned_size = ALIGN(size, PAGE_SIZE);
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ret = radeon_gem_object_create(rdev, aligned_size, 0,
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RADEON_GEM_DOMAIN_VRAM,
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false, ttm_bo_type_kernel,
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false, &gobj);
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if (ret) {
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printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
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surface_width, surface_height);
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ret = -ENOMEM;
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goto out;
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}
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robj = gobj->driver_private;
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if (fb_tiled)
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radeon_object_set_tiling_flags(robj, RADEON_TILING_MACRO|RADEON_TILING_SURFACE, mode_cmd.pitch);
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mutex_lock(&rdev->ddev->struct_mutex);
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fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
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if (fb == NULL) {
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DRM_ERROR("failed to allocate fb.\n");
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ret = -ENOMEM;
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goto out_unref;
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}
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ret = radeon_object_pin(robj, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
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if (ret) {
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printk(KERN_ERR "failed to pin framebuffer\n");
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ret = -ENOMEM;
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goto out_unref;
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}
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list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
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*fb_p = fb;
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rfb = to_radeon_framebuffer(fb);
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rdev->fbdev_rfb = rfb;
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rdev->fbdev_robj = robj;
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info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
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if (info == NULL) {
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ret = -ENOMEM;
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goto out_unref;
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}
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rfbdev = info->par;
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rfbdev->helper.funcs = &radeon_fb_helper_funcs;
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rfbdev->helper.dev = dev;
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ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, 2,
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RADEONFB_CONN_LIMIT);
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if (ret)
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goto out_unref;
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if (fb_tiled)
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radeon_object_check_tiling(robj, 0, 0);
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ret = radeon_object_kmap(robj, &fbptr);
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if (ret) {
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goto out_unref;
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}
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memset_io(fbptr, 0, aligned_size);
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strcpy(info->fix.id, "radeondrmfb");
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drm_fb_helper_fill_fix(info, fb->pitch);
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info->flags = FBINFO_DEFAULT;
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info->fbops = &radeonfb_ops;
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tmp = fb_gpuaddr - rdev->mc.vram_location;
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info->fix.smem_start = rdev->mc.aper_base + tmp;
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info->fix.smem_len = size;
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info->screen_base = fbptr;
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info->screen_size = size;
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drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
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/* setup aperture base/size for vesafb takeover */
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info->aperture_base = rdev->ddev->mode_config.fb_base;
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info->aperture_size = rdev->mc.real_vram_size;
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info->fix.mmio_start = 0;
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info->fix.mmio_len = 0;
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info->pixmap.size = 64*1024;
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info->pixmap.buf_align = 8;
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info->pixmap.access_align = 32;
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info->pixmap.flags = FB_PIXMAP_SYSTEM;
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info->pixmap.scan_align = 1;
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if (info->screen_base == NULL) {
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ret = -ENOSPC;
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goto out_unref;
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}
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DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
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DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
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DRM_INFO("size %lu\n", (unsigned long)size);
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DRM_INFO("fb depth is %d\n", fb->depth);
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DRM_INFO(" pitch is %d\n", fb->pitch);
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#ifdef __BIG_ENDIAN
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/* fill var sets defaults for this stuff - override
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on big endian */
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switch (fb->depth) {
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case 8:
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info->var.red.offset = 0;
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info->var.green.offset = 0;
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info->var.blue.offset = 0;
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info->var.red.length = 8; /* 8bit DAC */
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info->var.green.length = 8;
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info->var.blue.length = 8;
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info->var.transp.offset = 0;
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info->var.transp.length = 0;
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break;
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case 24:
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info->var.red.offset = 8;
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info->var.green.offset = 16;
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info->var.blue.offset = 24;
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info->var.red.length = 8;
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info->var.green.length = 8;
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info->var.blue.length = 8;
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info->var.transp.offset = 0;
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info->var.transp.length = 0;
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break;
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case 32:
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info->var.red.offset = 8;
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info->var.green.offset = 16;
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info->var.blue.offset = 24;
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info->var.red.length = 8;
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info->var.green.length = 8;
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info->var.blue.length = 8;
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info->var.transp.offset = 0;
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info->var.transp.length = 8;
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break;
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default:
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break;
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}
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#endif
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fb->fbdev = info;
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rfbdev->rfb = rfb;
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rfbdev->rdev = rdev;
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mutex_unlock(&rdev->ddev->struct_mutex);
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return 0;
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out_unref:
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if (robj) {
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radeon_object_kunmap(robj);
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}
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if (fb && ret) {
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list_del(&fb->filp_head);
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drm_gem_object_unreference(gobj);
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drm_framebuffer_cleanup(fb);
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kfree(fb);
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}
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drm_gem_object_unreference(gobj);
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mutex_unlock(&rdev->ddev->struct_mutex);
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out:
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return ret;
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}
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int radeonfb_probe(struct drm_device *dev)
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{
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int ret;
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ret = drm_fb_helper_single_fb_probe(dev, &radeonfb_create);
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return ret;
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}
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EXPORT_SYMBOL(radeonfb_probe);
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int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
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{
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struct fb_info *info;
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struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
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struct radeon_object *robj;
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if (!fb) {
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return -EINVAL;
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}
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info = fb->fbdev;
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if (info) {
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struct radeon_fb_device *rfbdev = info->par;
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robj = rfb->obj->driver_private;
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unregister_framebuffer(info);
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radeon_object_kunmap(robj);
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radeon_object_unpin(robj);
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drm_fb_helper_free(&rfbdev->helper);
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framebuffer_release(info);
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}
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printk(KERN_INFO "unregistered panic notifier\n");
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return 0;
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}
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EXPORT_SYMBOL(radeonfb_remove);
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MODULE_LICENSE("GPL");
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