4c456a67f5
_PAGE_COHERENT is now always set in _PAGE_RAM resp. PAGE_KERNEL. Thus it has to be masked out, if the BAT mapping should be non cacheable or CPU_FTR_NEED_COHERENT is not set. This will work on normal SMP setups because we force-set CPU_FTR_NEED_COHERENT as part of CPU_FTR_COMMON on SMP. Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
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| .. | ||
| 40x_mmu.c | ||
| 44x_mmu.c | ||
| Makefile | ||
| fault.c | ||
| fsl_booke_mmu.c | ||
| gup.c | ||
| hash_low_32.S | ||
| hash_low_64.S | ||
| hash_native_64.c | ||
| hash_utils_64.c | ||
| hugetlbpage.c | ||
| init_32.c | ||
| init_64.c | ||
| mem.c | ||
| mmap.c | ||
| mmu_context_hash32.c | ||
| mmu_context_hash64.c | ||
| mmu_context_nohash.c | ||
| mmu_decl.h | ||
| numa.c | ||
| pgtable.c | ||
| pgtable_32.c | ||
| pgtable_64.c | ||
| ppc_mmu_32.c | ||
| slb.c | ||
| slb_low.S | ||
| slice.c | ||
| stab.c | ||
| subpage-prot.c | ||
| tlb_hash32.c | ||
| tlb_hash64.c | ||
| tlb_nohash.c | ||
| tlb_nohash_low.S | ||