132 lines
5.3 KiB
C
132 lines
5.3 KiB
C
#ifndef __config_defs_asm_h
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#define __config_defs_asm_h
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/*
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* This file is autogenerated from
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* file: ../../rtl/config_regs.r
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* id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
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* last modfied: Thu Mar 4 12:34:39 2004
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*
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* by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/config_defs_asm.h ../../rtl/config_regs.r
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* id: $Id: config_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
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* Any changes here will be lost.
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*
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* -*- buffer-read-only: t -*-
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*/
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#ifndef REG_FIELD
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#define REG_FIELD( scope, reg, field, value ) \
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REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
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#define REG_FIELD_X_( value, shift ) ((value) << shift)
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#endif
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#ifndef REG_STATE
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#define REG_STATE( scope, reg, field, symbolic_value ) \
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REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
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#define REG_STATE_X_( k, shift ) (k << shift)
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#endif
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#ifndef REG_MASK
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#define REG_MASK( scope, reg, field ) \
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REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
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#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
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#endif
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#ifndef REG_LSB
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#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
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#endif
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#ifndef REG_BIT
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#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
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#define REG_ADDR_X_( inst, offs ) ((inst) + offs)
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
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STRIDE_##scope##_##reg )
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#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
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((inst) + offs + (index) * stride)
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#endif
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/* Register r_bootsel, scope config, type r */
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#define reg_config_r_bootsel___boot_mode___lsb 0
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#define reg_config_r_bootsel___boot_mode___width 3
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#define reg_config_r_bootsel___full_duplex___lsb 3
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#define reg_config_r_bootsel___full_duplex___width 1
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#define reg_config_r_bootsel___full_duplex___bit 3
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#define reg_config_r_bootsel___user___lsb 4
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#define reg_config_r_bootsel___user___width 1
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#define reg_config_r_bootsel___user___bit 4
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#define reg_config_r_bootsel___pll___lsb 5
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#define reg_config_r_bootsel___pll___width 1
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#define reg_config_r_bootsel___pll___bit 5
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#define reg_config_r_bootsel___flash_bw___lsb 6
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#define reg_config_r_bootsel___flash_bw___width 1
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#define reg_config_r_bootsel___flash_bw___bit 6
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#define reg_config_r_bootsel_offset 0
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/* Register rw_clk_ctrl, scope config, type rw */
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#define reg_config_rw_clk_ctrl___pll___lsb 0
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#define reg_config_rw_clk_ctrl___pll___width 1
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#define reg_config_rw_clk_ctrl___pll___bit 0
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#define reg_config_rw_clk_ctrl___cpu___lsb 1
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#define reg_config_rw_clk_ctrl___cpu___width 1
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#define reg_config_rw_clk_ctrl___cpu___bit 1
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#define reg_config_rw_clk_ctrl___iop___lsb 2
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#define reg_config_rw_clk_ctrl___iop___width 1
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#define reg_config_rw_clk_ctrl___iop___bit 2
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#define reg_config_rw_clk_ctrl___dma01_eth0___lsb 3
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#define reg_config_rw_clk_ctrl___dma01_eth0___width 1
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#define reg_config_rw_clk_ctrl___dma01_eth0___bit 3
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#define reg_config_rw_clk_ctrl___dma23___lsb 4
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#define reg_config_rw_clk_ctrl___dma23___width 1
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#define reg_config_rw_clk_ctrl___dma23___bit 4
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#define reg_config_rw_clk_ctrl___dma45___lsb 5
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#define reg_config_rw_clk_ctrl___dma45___width 1
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#define reg_config_rw_clk_ctrl___dma45___bit 5
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#define reg_config_rw_clk_ctrl___dma67___lsb 6
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#define reg_config_rw_clk_ctrl___dma67___width 1
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#define reg_config_rw_clk_ctrl___dma67___bit 6
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#define reg_config_rw_clk_ctrl___dma89_strcop___lsb 7
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#define reg_config_rw_clk_ctrl___dma89_strcop___width 1
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#define reg_config_rw_clk_ctrl___dma89_strcop___bit 7
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#define reg_config_rw_clk_ctrl___bif___lsb 8
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#define reg_config_rw_clk_ctrl___bif___width 1
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#define reg_config_rw_clk_ctrl___bif___bit 8
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#define reg_config_rw_clk_ctrl___fix_io___lsb 9
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#define reg_config_rw_clk_ctrl___fix_io___width 1
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#define reg_config_rw_clk_ctrl___fix_io___bit 9
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#define reg_config_rw_clk_ctrl_offset 4
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/* Register rw_pad_ctrl, scope config, type rw */
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#define reg_config_rw_pad_ctrl___usb_susp___lsb 0
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#define reg_config_rw_pad_ctrl___usb_susp___width 1
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#define reg_config_rw_pad_ctrl___usb_susp___bit 0
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#define reg_config_rw_pad_ctrl___phyrst_n___lsb 1
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#define reg_config_rw_pad_ctrl___phyrst_n___width 1
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#define reg_config_rw_pad_ctrl___phyrst_n___bit 1
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#define reg_config_rw_pad_ctrl_offset 8
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/* Constants */
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#define regk_config_bw16 0x00000000
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#define regk_config_bw32 0x00000001
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#define regk_config_master 0x00000005
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#define regk_config_nand 0x00000003
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#define regk_config_net_rx 0x00000001
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#define regk_config_net_tx_rx 0x00000002
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#define regk_config_no 0x00000000
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#define regk_config_none 0x00000007
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#define regk_config_nor 0x00000000
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#define regk_config_rw_clk_ctrl_default 0x00000002
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#define regk_config_rw_pad_ctrl_default 0x00000000
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#define regk_config_ser 0x00000004
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#define regk_config_slave 0x00000006
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#define regk_config_yes 0x00000001
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#endif /* __config_defs_asm_h */
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